Interposer and test assembly for testing electronic devices
First Claim
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1. An interposer for interconnecting an electronic device and a circuitized substrate, said interposer comprising:
- a housing adapted for being positioned on a host circuitized substrate including a plurality of host conductor pads;
a first circuitized substrate positioned within said housing and including a first plurality of contact pads of a first density, selected ones of said first plurality of contact pads of said first circuitized substrate adapted for engaging respective ones of said host conductor pads of said host circuitized substrate; and
a second circuitized substrate positioned on said first circuitized substrate and electrically coupled thereto, said second circuitized substrate adapted for engaging an electronic device including a plurality of contact sites thereon of a second density different than said first density of said first plurality of contact pads of said first circuitized substrate, said second circuitized substrate including a first plurality of sculpted contact members of a density similar to said second density of said contact sites of said electronic device, selected ones of said first plurality of sculpted contact members of said second circuitized substrate adapted for engaging respective ones of said contact sites of said electronic device when said electronic device is positioned on said second circuitized substrate, said first circuitized substrate including a plurality of conductive lines therein which intercouple said selected ones of said first plurality of contact pads of said first circuitized substrate to said selected ones of said first plurality of contact members of said second circuitized substrate.
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Abstract
A test apparatus which uses a pair of substrates and housing to interconnect a host substrate (e.g., PCB) to an electronic device (e.g., semiconductor chip) to accomplish testing of the device. The apparatus includes a housing designed for being positioned on the PCB and have one of the substrates oriented therein during device engagement. The engaging contacts of the upper (second) substrate are sculpted to assure effective chip connection.
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Citations
22 Claims
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1. An interposer for interconnecting an electronic device and a circuitized substrate, said interposer comprising:
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a housing adapted for being positioned on a host circuitized substrate including a plurality of host conductor pads;
a first circuitized substrate positioned within said housing and including a first plurality of contact pads of a first density, selected ones of said first plurality of contact pads of said first circuitized substrate adapted for engaging respective ones of said host conductor pads of said host circuitized substrate; and
a second circuitized substrate positioned on said first circuitized substrate and electrically coupled thereto, said second circuitized substrate adapted for engaging an electronic device including a plurality of contact sites thereon of a second density different than said first density of said first plurality of contact pads of said first circuitized substrate, said second circuitized substrate including a first plurality of sculpted contact members of a density similar to said second density of said contact sites of said electronic device, selected ones of said first plurality of sculpted contact members of said second circuitized substrate adapted for engaging respective ones of said contact sites of said electronic device when said electronic device is positioned on said second circuitized substrate, said first circuitized substrate including a plurality of conductive lines therein which intercouple said selected ones of said first plurality of contact pads of said first circuitized substrate to said selected ones of said first plurality of contact members of said second circuitized substrate. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A test assembly for testing an electronic device, said test assembly comprising:
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a host circuitized substrate including a plurality of host conductor pads;
a housing positioned on said host circuitized substrate substantially over said plurality of host conductor pads;
a first circuitized substrate positioned within said housing and including a first plurality of contact pads of a first density, selected ones of said first plurality of contact pads of said first circuitized substrate adapted for engaging respective ones of said host conductor pads of said host circuitized substrate; and
a second circuitized substrate positioned on said first circuitized substrate and electrically coupled thereto, said second circuitized substrate adapted for engaging an electronic device including a plurality of contact sites thereon of a second density different than said first density of said first plurality of contact pads of said first circuitized substrate, said second circuitized substrate including a first plurality of sculpted contact members of a density similar to said second density of said electronic device, selected ones of said first plurality of sculpted contact members of said second circuitized substrate adapted for engaging respective ones of said contact sites of said electronic device when said electronic device is positioned on said second circuitized substrate, said first circuitized substrate including a plurality of conductive lines therein which intercouple said selected ones of said first plurality of contact pads of said first circuitized substrate to said selected ones of said first plurality of contact members of said second circuitized substrate such that testing of said electronic device may occur while said electronic device is positioned on said second circuitized substrate and said test assembly is in operation. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22)
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Specification