Switching regulator duty cycle control in a fixed frequency operation

• US 20070075790A1
• Filed: 10/03/2005
• Published: 04/05/2007
• Est. Priority Date: 10/03/2005
• Status: Active Grant

• Current Assignee: Analog Devices International Unlimited Company (Analog Devices, Inc.)
• Original Assignee: Linear Technology Corporation (Analog Devices, Inc.)
• Inventors: Liao, Chiawei
• Granted Patent: US 7,388,444 B2
• Time in Patent Office: Days
• US Class Current: 331/36.C
• CPC Class Codes: H02M 3/156 with automatic control of output voltage or current, e.g. switching regulators
• CPC Class Codes: H03K 7/08 Duration or width modulation ; Duty cycle modulation

Abstract

A clock oscillator system for use in providing the switching regulator duty cycle control in a fixed frequency (no cycle skipping) operation is provided. In one embodiment, the circuit according to the invention uses an analog feedback loop to extend the switch ON time of the clock cycle by controlling the oscillator charging current and, thereby, increase the duty cycle. Preferably, this circuit can achieve very high switching duty cycle and/or very low switching duty cycle in a PWM switching regulator operated in very low drop-out operation when very high duty cycle is required or in other conditions when very low duty cycle is required.

Claims

1. A clock oscillator system that provides a clock signal, the clock oscillator system comprising:

an oscillator circuit comprising;

a capacitor;

a current source that uses a charging current for a charging period of time to charge the capacitor;

a current sink that uses a discharging current for a discharging period of time to discharge the capacitor; and

an amplifier circuit that extends the charging period of time by diverting a portion of the charging current.

2. The clock oscillator system of claim 1 wherein the clock oscillator system maintains the discharging period of time constant independent of whether the amplifier circuit extends the charging period of time.

3. The clock oscillator system of claim 1 wherein the clock oscillator system provides a clock signal for a pulse-width modulated switching regulator.

4. The clock oscillator system of claim 3 wherein the amplifier further comprises a switch responsive to the switch-OFF time of the pulse-width modulated switching regulator.

5. The clock oscillator system of claim 1 wherein the amplifier further comprises an input from an output of the oscillator circuit.

6. A clock oscillator system that provides a clock signal for a switching voltage regulator, the clock oscillator system comprising:

an oscillator circuit comprising;

a capacitor;

a current source that uses a charging current for a charging period of time to charge the capacitor;

a current sink that uses a discharging current for a discharging period of time to discharge the capacitor; and

an amplifier circuit that reduces a duty cycle of the switching voltage regulator by diverting a portion of the charging current.

7. The clock oscillator system of claim 6 wherein the clock oscillator system maintains the discharging period of time constant independent of whether the amplifier circuit reduces the charging period of time.

8. The clock oscillator system of claim 6 wherein the clock oscillator system provides a clock signal for a pulse-width modulated switching regulator.

9. The clock oscillator system of claim 8 wherein the amplifier further comprises a switch responsive to the switch-ON time of the pulse-width modulated switching regulator.

10. The clock oscillator system of claim 6 wherein the amplifier further comprises an input from an output of the oscillator circuit.

11. A method for increasing duty cycle in a pulse-width-modulated voltage regulator, the pulse-width-modulated voltage regulator including a clock oscillator having a capacitor, the oscillator that provides a clock signal, the method comprising:

using a charging current to charge the capacitor for a charging period of time;

using a discharging current to discharge the capacitor for a discharging period of time; and

extending the charging period of time by diverting a portion of the charging current.

12. The method of claim 11 further comprising maintaining the discharging period of time constant independent of whether the amplifier circuit extends the charging period of time.

13. The method of claim 11 further comprising using the clock oscillator to provide a clock signal for the pulse-width-modulated switching regulator.

14. The method of claim 13 further comprising causing the clock oscillator to be responsive to the switch-OFF time of the pulse-width modulated switching regulator.

15. The method of claim 11 further comprising using an output of the clock oscillator system as an input to the clock oscillator system.

16. A method for decreasing duty cycle in a pulse-width-modulated voltage regulator, the pulse-width-modulated voltage regulator including a clock oscillator having a capacitor, the oscillator that provides a clock signal, the method comprising:

using a charging current to charge the capacitor for a charging period of time;

using a discharging current to discharge the capacitor for a discharging period of time; and

increasing the charging period of time by diverting a portion of the charging current, the increasing the charging period of time that reduces the duty cycle of the pulse-width-modulated voltage regulator.

17. The method of claim 16 further comprising maintaining the discharging period of time constant independent of whether the amplifier circuit extends the charging period of time.

18. The method of claim 16 further comprising using the clock oscillator to provide a clock signal for the pulse-width-modulated switching regulator.

19. The method of claim 18 further comprising causing the clock oscillator to be responsive to the switch-ON time of the pulse-width modulated switching regulator.

20. The method of claim 16 further comprising using an output of the clock oscillator system as an input to the clock oscillator system.