FABRICATING METHOD OF A PIXEL STRUCTURE

• US 20070076156A1
• Filed: 10/04/2006
• Published: 04/05/2007
• Est. Priority Date: 12/05/2003
• Status: Active Grant

• Current Assignee: Chien-Sheng Yang
• Original Assignee: Chien-Sheng Yang
• Inventors: Yang, Chien-Sheng
• Granted Patent: US 7,515,217 B2
• Time in Patent Office: Days
• US Class Current: 349/139
• CPC Class Codes: G02F 1/136213 Storage capacitors associated with the pixel electrode
• CPC Class Codes: G02F 1/136218 Shield electrodes
• CPC Class Codes: G02F 1/136227 Through-hole connection of the pixel electrode to the active element through an insulation layer

Abstract

A fabricating method of a pixel structure is disclosed. The pixel structure is disposed on a substrate. The pixel structure comprises a scan line, a data line, an active element, a capacitor electrode, a pixel electrode and an electric field shielding layer. The fabricating method of the pixel structure comprises forming the scan line, the data line and the active element on the substrate first. The scan line and the data line are electrically coupled to the active element. Then, the capacitor electrode and the electric field shielding layer are formed on the substrate. Finally, the pixel electrode is formed on the substrate, covering the capacitor electrode and electrically coupled to the active element. The pixel electrode and the capacitor electrode form a pixel storage capacitor. The electric field shielding layer can avoid the interference between the data line and the pixel electrode.

Claims

1. A method of fabricating a pixel structure, comprising:

sequentially forming an active element, a scan line and a data line on a substrate, the active element being electrically coupled to the scan line and the data line;

forming a capacitor electrode on the substrate;

forming an electrical field shielding layer on the substrate, covering the data line; and

forming a pixel electrode on the substrate, covering the capacitor electrode and electrically coupled to the active element, wherein the pixel electrode and the capacitor electrode are coupled as a pixel storage capacitor.

2. The method of fabricating a pixel structure of claim 1, wherein the electrical field shielding layer and the capacitor electrode are formed by a patterned material layer.

3. The method of fabricating a pixel structure of claim 1, wherein the active element comprises a low temperature polysilicon thin film transistor.

4. The method of fabricating a pixel structure of claim 3, while forming the data line, further comprising forming a source/drain conductive layer over the active element, wherein the active element is electrically coupled to the data line and the pixel electrode through the drain/source conductive layer.

5. The method of fabricating a pixel structure of claim 3, after forming the data line, further comprising a step of forming a conductive layer over the active element, wherein the active element is electrically coupled to the data line through the drain/source conductive layer, and the pixel electrode is directly electrically coupled to the active element.

6. The method of fabricating a pixel structure of claim 5, wherein the conductive layer and the pixel electrode are formed from a patterned material layer.

7. The method of fabricating a pixel structure of claim 3, wherein the step of forming the active element comprises:

forming a polysilicon layer on the substrate;

forming a gate dielectric layer on the substrate, covering the polysilicon layer;

forming a gate terminal on the gate dielectric layer and over the polysilicon layer; and

forming a source/drain doped region within the polysilicon layer besides the gate terminal.

8. The method of fabricating a pixel structure of claim 7, wherein the step of forming the source/drain doped region comprises performing a doping process using the gate terminal as a hard mask for forming the source/drain doped region.

9. The method of fabricating a pixel structure of claim 1, wherein the active element comprises an amorphous silicon thin film transistor.

10. The method of fabricating a pixel structure of claim 9, wherein the step of forming the active element comprises:

forming a gate terminal on the substrate, electrically coupled to the scan line;

forming a gate dielectric layer on the substrate, covering the gate terminal;

forming a channel on the gate dielectric layer and over the gate terminal; and

forming a source/drain terminal on the channel.

11. The method of fabricating a pixel structure of claim 1, after forming the capacitor electrode and before forming the pixel electrode, further comprising a step of forming a transparent capacitor electrode on the capacitor electrode.

12. The method of fabricating a pixel structure of claim 11, wherein the capacitor electrode or the transparent capacitor electrode is formed along with the electrical field shielding layer by a patterned material layer.

13. The method of fabricating a pixel structure of claim 1, wherein the capacitor electrode, the electrical field shielding layer and the pixel electrode are made from indium tin oxide or indium zinc oxide.