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Power-efficient technique for invoking a co-processor

  • US 20070079161A1
  • Filed: 09/30/2005
  • Published: 04/05/2007
  • Est. Priority Date: 09/30/2005
  • Status: Active Grant
First Claim
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1. A method of processing data in a computer system having a first processor and a second processor, the method comprising:

  • instructing the second processor to perform an operation repeatedly on a data stream;

    placing the first processor in a low power state; and

    performing the operation repeatedly on the data stream with the second processor while the first processor remains in the low-power sleep mode.

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