Electronic circuit chip, and electronic circuit device and method for manufacturing the same

• US 20070080444A1
• Filed: 10/05/2006
• Published: 04/12/2007
• Est. Priority Date: 10/07/2005
• Status: Active Grant

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: NEC Electronics Corporation (Renesas Electronics Corporation)
• Inventors: Soejima, Koji, Kawano, Masaya, Kurita, Yoichiro
• Granted Patent: US 7,759,786 B2
• Time in Patent Office: Days
• US Class Current: 257/700
• CPC Class Codes: H01L 21/563 Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 2221/68345 used as a support during the manufacture of self supporting substrates
• CPC Class Codes: H01L 2224/1147 using a lift-off mask
• CPC Class Codes: H01L 2224/13099 Material
• CPC Class Codes: H01L 2224/13111 Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/16145 the bodies being stacked
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/29111 Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/2919 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/73104 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2224/73203 Bump and layer connectors
• CPC Class Codes: H01L 2224/73204 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2224/81191 wherein the bump connectors are disposed only on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/81203 Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
• CPC Class Codes: H01L 2224/8182 Diffusion bonding
• CPC Class Codes: H01L 2224/83191 wherein the layer connectors are disposed only on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/83856 Pre-cured adhesive, i.e. B-stage adhesive
• CPC Class Codes: H01L 23/3128 the substrate having spherical bumps for external connection
• CPC Class Codes: H01L 24/11 : Manufacturing methods for bumps on insulating substrates H01L21/4853
• CPC Class Codes: H01L 24/12 : Structure, shape, material or disposition of the bump connectors prior to the connecting process
• CPC Class Codes: H01L 24/16 : of an individual bump connector
• CPC Class Codes: H01L 24/29 : of an individual layer connector
• CPC Class Codes: H01L 24/81 : using a bump connector
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01015 : Phosphorus [P]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01046 : Palladium [Pd]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/0132 : Binary Alloys
• CPC Class Codes: H01L 2924/0133 : Ternary Alloys
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/0695 : Polyamide
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/1532 : the connection portion being formed on the die mounting surface of the substrate
• CPC Class Codes: H01L 2924/18161 : of a flip chip

Abstract

An insulating layer 12 is formed as a surface layer of electronic circuit chip 10. A conductor interconnect 14 is formed in the insulating layer 12. The conductor interconnect 14 is exposed in the surface of the insulating layer 12. A solder wetting metallic film 16 (a metallic film) is formed on a portion of the conductor interconnect 14 to be exposed in the surface of the insulating layer 12. Typical metallic material (second metallic material) available for composing the solder wetting metallic film 16 includes a material that requires higher free energy for forming an oxide thereof, as compared with a free energy required for forming an oxide of the metallic material composing the conductor interconnect 14.

Claims

1. An electronic circuit chip having an insulating layer provided as a surface layer, comprising:

a patterned conductor, provided in said insulating layer and exposed in a surface of said insulating layer; and

a metallic film, provided on a portion of said patterned conductor and composed of a second metallic material, which requires higher free energy for forming an oxide than a free energy that is required by a first metallic material for forming an oxide, said first metallic material composing said patterned conductor.

2. The electronic circuit chip according to claim 1, further comprising a metal oxide film, provided on a region of said patterned conductor where said metallic film is not provided, and composed of an oxide of said first metallic material.

3. The electronic circuit chip according to claim 1,

wherein said second metallic material is Au, Ag, Pt or Pd.

4. The electronic circuit chip according to claim 1,

wherein said patterned conductor is an interconnect of the electronic circuit chip.

5. The electronic circuit chip according to claim 1,

wherein said first metallic material is Cu, Ni or Al.

6. An electronic circuit device, comprising:

a first electronic circuit chip, which is the electronic circuit chip according to claim 1;

and

a second electronic circuit chip, which is joined to said first electronic circuit chip in the side of said surface layer,

wherein said second electronic circuit chip includes a resin layer provided in a surface layer in the side of said first electronic circuit chip; and

a solder layer, provided in said resin layer and exposed in a surface of said resin layer, and

wherein said first and second electronic circuit chips are joined to each other by connecting said metallic film and said solder layer.

7. The electronic circuit device according to claim 6,

wherein said metallic film and said solder layer form an alloy layer that contains metallic elements, which respectively compose said metallic film and said solder layer.

8. The electronic circuit device according to claim 6,

wherein said second electronic circuit chip has a conductor layer, provided in said resin layer and having said solder layer formed on an end surface of said conductor layer, and

wherein said conductor layer is composed of a conductor material that has higher melting point than that of a solder material composing said solder layer.

9. The electronic circuit device according to claim 8,

wherein a conductor material that composes said conductor layer is Cu or Ni.

10. The electronic circuit device according to claim 8,

wherein said conductor layer has a multiple-layered structure of a Cu layer and a Ni layer.

11. The electronic circuit device according to claim 6,

wherein a resin that composes said resin layer is a thermoplastic resin, or a partially cured thermosetting resin.

12. The electronic circuit device according to claim 6,

wherein a solder material that composes said solder layer is Sn, SnAg, SnCu or SnAgCu.

13. A method for manufacturing an electronic circuit device, comprising:

preparing a first electronic circuit chip, which is the electronic circuit chip according to claim 1;

preparing a second electronic circuit chip that includes a resin layer provided in a surface layer and a solder layer provided in said resin layer and exposed in a surface of said resin layer; and

connecting said metallic film of said first electronic circuit chip and said solder layer of said second electronic circuit chip by heating said solder layer, while said solder layer is pressed against said metallic film.