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Lithography process to reduce interference

  • US 20070087291A1
  • Filed: 10/18/2005
  • Published: 04/19/2007
  • Est. Priority Date: 10/18/2005
  • Status: Abandoned Application
First Claim
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1. A method for patterning non-parallel resist lines comprising the steps of:

  • providing a resist layer on a substrate;

    illuminating a first group of line patterns through a first mask on the resist layer;

    illuminating a second group of line patterns through a second mask on the resist layer, the second group of line patterns oriented nonparallel with respect to the first group of line patterns; and

    , developing the illuminated resist layer.

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