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SYSTEM AND METHOD FOR VERIFYING THE COUPLED LOCATIONS OF COMPUTER DEVICES

  • US 20070094427A1
  • Filed: 08/10/2006
  • Published: 04/26/2007
  • Est. Priority Date: 10/26/2005
  • Status: Abandoned Application
First Claim
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1. A system for verifying the coupled locations of computer devices, the system comprising:

  • a mapping module for mapping a logical address of each device interface on a standard motherboard to a physical address of the device interface on the standard motherboard;

    a location obtaining module for obtaining a logical address of each device linked to the standard motherboard of a computer to be verified based on computer assembly standards and a bill of material, and for obtaining a physical address of the device based on the logical address and a corresponding mapping relationship of a device interface to which the device is linked; and

    a writing module for writing the physical addresses of all the devices into a device specification file.

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