High-gain vertex lateral bipolar junction transistor

• US 20070105301A1
• Filed: 10/30/2006
• Published: 05/10/2007
• Est. Priority Date: 10/31/2005
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Chang, Chih-Sheng, Chao, Chih-Ping, Chen, Shuo-Mao
• Granted Patent: US 7,701,038 B2
• Time in Patent Office: Days
• US Class Current: 438/234
• CPC Class Codes: H01L 29/0692 Surface layout
• CPC Class Codes: H01L 29/735 Lateral transistors

Abstract

A lateral bipolar junction transistor having improved current gain and a method for forming the same are provided. The transistor includes a well region of a first conductivity type formed over a substrate, at least one emitter of a second conductivity type opposite the first conductivity type in the well region wherein each of the at least one emitters are interconnected, a plurality of collectors of the second conductivity type in the well region wherein the collectors are interconnected to each other, and a plurality of base contacts of the first conductivity type in the well region wherein the base contacts are interconnected to each other. Preferably, all sides of the at least one emitters are adjacent the collectors, and none of the base contacts are adjacent the sides of the emitters. The neighboring emitter, collectors and base contacts are separated by spacings in the well region.

Claims

1. A lateral bipolar junction transistor comprising:

a well region of a first conductivity type formed over a substrate;

an emitter in the well region, wherein the emitter is of a second conductivity type opposite the first conductivity type, and wherein the emitter has a polygon shape with a plurality of sides;

a plurality of collectors of the second conductivity type in the well region and interconnected to each other, wherein each one of the plurality of sides of the emitter has a collector adjacent and substantially aligned with one of the collectors;

a plurality of base contacts of the first conductivity type in the well region and interconnected to each other, wherein the base contacts are adjacent the collectors, and wherein none of the base contacts is adjacent or substantially aligned with a side of the emitter; and

wherein the emitter and neighboring collectors and base contacts are separated by spacings in the well region.

2. The lateral bipolar junction transistor of claim 1, wherein the spacings have a width substantially close to a critical dimension.

3. The lateral bipolar junction transistor of claim 1 further comprising a dielectric layer over the spacings, and a polysilicon on the dielectric layer.

4. The lateral bipolar junction transistor of claim 1 further comprising a resist protective oxide over the spacings.

5. The lateral bipolar junction transistor of claim 1, wherein the emitter has a length or a width substantially close to a critical dimension.

6. The lateral bipolar junction transistor of claim 1, wherein the emitter, the collectors and the base contacts are squares.

7. The lateral bipolar junction transistor of claim 1, wherein the emitter has a triangular shape, the collectors have a hexagonal shape and the base contacts have a triangular shape.

8. The lateral bipolar junction transistor of claim 1, wherein the emitter has a hexagonal shape, the collectors have a triangular shape and the base contacts have a diamond shape.

9. The lateral bipolar junction transistor of claim 1 further comprising additional emitters, wherein the emitter and the additional emitters are arranged as an array and are interconnected.

10. The lateral bipolar junction transistor of claim 1, wherein each of the collectors further comprises a collector extension on a first side of the collector facing the emitter, wherein a second side opposite the first side is free from a collector extension.

11. The lateral bipolar junction transistor of claim 1, wherein at least one of the collector extensions has a same dopant and a same depth as a LDD region of an input/output (I/O) MOS device.

12. The lateral bipolar junction transistor of claim 1, wherein the emitter, the collectors and the base contacts are free from adjacent pocket regions in the well region.

13. A lateral bipolar junction transistor comprising:

a well region of a first conductivity type formed over a substrate;

at least one emitter of a second conductivity type opposite the first conductivity type in the well region, wherein each of the at least one emitters are interconnected;

a plurality of collectors of the second conductivity type in the well region, wherein the plurality of collectors are interconnected to each other;

a plurality of base contacts of the first conductivity type in the well region, wherein the bases are interconnected to each other;

wherein each of the at least one emitters is surrounded by the collectors, and none of the base contacts are adjacent a side of the at least one emitter; and

wherein the emitter and neighboring collectors are separated by spacings in the well region, and further wherein the collectors and neighboring base contacts are separated by spacings in the well region.

14. The lateral bipolar junction transistor of claim 13, wherein the first conductivity type is N-type and the second conductivity type is P-type.

15. The lateral bipolar junction transistor of claim 13, wherein the first conductivity type is P-type and the second conductivity type is N-type.

16. The lateral bipolar junction transistor of claim 13, wherein the at least one emitter, the base contacts and the collectors are polygons.

17. The lateral bipolar junction transistor of claim 13, wherein the at least one emitter, the collectors and the base contacts have irregular shapes.

18. The lateral bipolar junction transistor of claim 13, wherein an emitter is separated from a nearest base contact by a collector.

19. An array-shaped lateral bipolar junction transistor comprising:

a well region of a first conductivity type formed over a substrate;

a plurality of emitters of a second conductivity type opposite the first conductivity type in the well region, wherein the emitters are arranged in rows and columns and are interconnected;

a plurality of collectors of the second conductivity type in the well region, wherein the collectors are interconnected;

a plurality of base contacts of the first conductivity type in the well region, wherein the base contacts are interconnected to each other;

wherein all sides of each of the emitters are adjacent the collectors and are not adjacent the base contacts; and

wherein neighboring emitters, collectors and base contacts are separated by respective spacings in the well region.

20. The array-shaped lateral bipolar junction transistor of claim 19, wherein a portion of the collectors are adjacent more than one of the emitters.