Architecture for generating intermediate representations for program code conversion
First Claim
1. A method of translating subject code of a subject architecture into target code of a target architecture, comprising the computer-implemented steps of:
- decoding the subject code and generating an intermediate representation including a plurality of subject architecture specific nodes which are specific to the subject architecture;
converting the subject architecture specific nodes into target architecture specific nodes which are specific to the target architecture; and
generating target code from the intermediate representation including generating target code instructions from the target architecture specific nodes.
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Abstract
An improved architecture for a program code conversion apparatus and method for generating intermediate representations for program code conversion. The program code conversion apparatus determines which types of IR nodes to generate in an intermediate representation (IR) of subject code (10) to be translated. Depending upon the particular subject and target computing environments involved in the conversion, the program code conversion apparatus utilizes either base nodes, complex nodes, polymorphic nodes, and architecture specific nodes, or some combination thereof, in generating the intermediate representation.
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Citations
15 Claims
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1. A method of translating subject code of a subject architecture into target code of a target architecture, comprising the computer-implemented steps of:
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decoding the subject code and generating an intermediate representation including a plurality of subject architecture specific nodes which are specific to the subject architecture;
converting the subject architecture specific nodes into target architecture specific nodes which are specific to the target architecture; and
generating target code from the intermediate representation including generating target code instructions from the target architecture specific nodes. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A computer readable storage medium having translator software resident thereon in the form of computer readable code executable by a computer to perform the steps of:
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decoding the subject code and generating an intermediate representation including a plurality of subject architecture specific nodes which are specific to the subject architecture;
converting the subject architecture specific nodes into target architecture specific nodes which are specific to the target architecture; and
generating target code from the intermediate representation including generating target code instructions from the target architecture specific nodes.
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15. A translator apparatus for use in a target computing environment having a processor and a memory coupled to the processor for translating subject code capable of being executed on a subject architecture to target program code capable of being executed on the target architecture of the target computing environment using the translator apparatus, wherein the translator apparatus comprises:
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a decoder unit arranged to decode the subject code and generate an intermediate representation including a plurality of subject architecture specific nodes which are specific to the subject architecture;
a converter unit arranged to convert the subject architecture specific nodes into target architecture specific nodes which are specific to the target architecture; and
a generator unit arranged to generate target code from the intermediate representation including generating target code instructions from the target architecture specific nodes.
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Specification