Buffer management in vector graphics hardware
First Claim
1. A processor unit for processing vector graphics primitives, the processor unit comprising:
- counters configured to store a value indicating a current state of a fill rule for each of a sub-pixel sampling point for a pixel;
a bus for receiving instructions and data;
a first internal buffer configured to store at least one indicator bit value for each pixel; and
determination logic configured to determine whether or not to retrieve and to retrieve the counter value from a memory based on the indicator bit values.
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Accused Products
Abstract
A graphics processor or a graphics block for use in a processor includes a type buffer used for determining if a currently processed pixel requires further processing. Each pixel has a number of sub-pixels and each sub-pixel line includes at least one counter that is stored in an edge buffer. A limited edge buffer that can store edge buffer values in a limited range can be employed. Each buffer can include information regarding the whole screen or a portion of thereof. The edge buffer also can be an external or internal buffer, and when implemented internally, the graphics processor or graphics block need not employ a bi-directional bus.
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Citations
23 Claims
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1. A processor unit for processing vector graphics primitives, the processor unit comprising:
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counters configured to store a value indicating a current state of a fill rule for each of a sub-pixel sampling point for a pixel;
a bus for receiving instructions and data;
a first internal buffer configured to store at least one indicator bit value for each pixel; and
determination logic configured to determine whether or not to retrieve and to retrieve the counter value from a memory based on the indicator bit values. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A graphics processing device, comprising:
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a display;
a processing unit for processing vector graphics primitives, and including;
counters configured to store a value indicating a current state of a fill rule for each of a sub-pixel sampling point for a pixel, a bus for receiving instructions and data, a first internal buffer configured to store at least one indicator bit value for each pixel, a memory for storing data, and determination logic configured to determine whether or not to retrieve and to retrieve the counter value from a memory based on the indicator bit values. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23)
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Specification