ANALOG-TO-DIGITAL CONVERTER

• US 20070115159A1
• Filed: 03/01/2006
• Published: 05/24/2007
• Est. Priority Date: 11/18/2005
• Status: Active Grant

• Current Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Original Assignee: Fujitsu Limited
• Inventors: Tachibana, Suguru, Kato, Tatsuo, Mitsuda, Kazuhiro
• Granted Patent: US 7,233,273 B2
• Time in Patent Office: Days
• US Class Current: 341/144
• CPC Class Codes: H03M 1/0682 using a differential network structure, i.e. symmetrical with respect to ground
• CPC Class Codes: H03M 1/1023 Offset correction H03M1/1019 takes precedence; removal of offset already present on the analogue input signal H03M1/1295
• CPC Class Codes: H03M 1/468 in which the input S/H circuit is merged with the feedback DAC array
• CPC Class Codes: H03M 1/804 with charge redistribution

Abstract

Included are a first DAC taking in and retaining sample data of a first analog signal and generating a comparison signal serving as an object of comparison with the first analog signal, a second DAC taking in and retaining sample data of a second analog signal and generating a comparison signal as an object of comparison with the second analog signal, a first switch connecting the first digital-to-analog converter to an output side of a second digital converter in a openable/closable manner, a comparator comparing, when the first switch is opened, a differential value between the first analog signal and the second analog signal with a differential value between an output signal of the first DAC and an output signal of the second DAC, and an electric potential control circuit controlling fluctuations in electric potentials of a first analog terminal and a second analog terminal.

Claims

1. An analog-to-digital converter circuit comprising:

a first analog terminal receiving an input of a first analog signal;

a first input switch inputting the first analog signal to said first analog terminal;

a second analog terminal receiving an input of a second analog signal;

a second input switch inputting the second analog signal to said second analog terminal;

a first reference voltage connecting terminal supplied with a first reference voltage;

a second reference voltage connecting terminal supplied with a second reference voltage;

a first unit including a digital-to-analog converter which generates a comparison signal serving as an object of comparison of the first analog signal, the first unit taking in and retaining the first analog signal from said first analog terminal and outputting a result of comparing the comparison signal and the first analog signal;

a second unit including a digital-to-analog converter which generates a comparison signal serving as an object of comparison of the second analog signal, the second unit taking in and retaining the second analog signal from said second analog terminal and outputting a result of comparing the comparison signal and the second analog signal;

a first switch connecting in a mutually openable/closable manner an output side of said first unit to an output side of said second unit;

a comparator comparing, when said first switch is opened, a differential value between the first analog signal and the second analog signal with a differential value between the comparison signal of said first digital-to-analog converter and the comparison signal of said second digital-to-analog converter; and

an electric potential control circuit controlling a fluctuation in the electric potentials of said first analog terminal and said second analog terminal,

wherein said first digital-to-analog converter has a plurality of capacitance elements, a first set of a plurality of switches connecting respective input-side terminals of said plurality of capacitance elements to any one of said first analog terminal, said first reference voltage terminal and said second reference voltage terminal, and a first common terminal connecting in common a plurality of output-side terminals facing said respective input-side terminals of said plurality of capacitance elements,

wherein said second digital-to-analog converter has a plurality of capacitance elements, a second set of a plurality of switches connecting respective input-side terminals of said plurality of capacitance elements to any one of said second analog terminal, said first reference voltage terminal and said second reference voltage terminal, and a second common terminal connecting in common a plurality of output-side terminals facing said respective input-side terminals of said plurality of capacitance elements,

wherein at a point of time when said first unit and said second unit take in the first analog signal and the second analog signal by said first input switch and said second input switch inputting the first analog signal and the second analog signal to said first analog terminal and said second analog terminal, said first common terminal and said second common terminal are connected to each other by said first switch, the connection between said first common terminal and said second common terminal is released when completing the take-in, and

said electric potential control circuit, when said first input switch and said second input switch are opened after the completion of taking in the first analog signal and the second analog signal, restrains a fluctuation in the electric potential of said first analog terminal and the electric potential of said second analog terminal.

2. The analog-to-digital converter according to claim 1, wherein said electric potential control circuit includes a second switch connecting said first analog terminal and said second analog terminal in a mutually openable/closable manner, and

when said first input switch and said second input switch are opened after completing the take-in of the first analog signal and the second analog signal, the connection by said first switch is released, and said first analog terminal and said second analog terminal are connected to each other by said second switch.

3. The analog-to-digital converter according to claim 1, wherein each of said first input switch and said second input switch has a MOS transistor operating to open and close by controlling a gate voltage between the first reference voltage and the second reference voltage, and

said electric potential control circuit includes:

a first adjusting MOS transistor of which a source and a drain are connected to said first analog terminal and of which a gate is controlled between the first reference voltage and the second reference voltage;

a second adjusting MOS transistor of which a source and a drain are connected to said second analog terminal and of which a gate is controlled between the first reference voltage and the second reference voltage; and

a gate control circuit controlling, after completing the take-in of the first analog signal and the second analog signal, when said first input switch is opened by controlling the gate voltage of said MOS transistor of said first input switch, the gate voltage of said first adjusting MOS transistor in a direction reversed to the gate voltage of said MOS transistor of said first input switch, and controlling, when said second input switch is opened by controlling the gate voltage of said MOS transistor of said second input switch, the gate voltage of said second adjusting MOS transistor in a direction reversed to the gate voltage of said MOS transistor of said second input switch.

4. The analog-to-digital converter according to claim 3, wherein each of said first switch and said second switch has a first MOS transistor of a first conductivity type and a second MOS transistor of a second conductivity type, becomes conductive by setting a gate voltage of said first MOS transistor to the first reference voltage and a gate voltage of said second MOS transistor to the second reference voltage, and is shut off by setting the gate voltage of said first MOS transistor to the second reference voltage and the gate voltage of said second MOS transistor to the first reference voltage, and

each of said first adjusting MOS transistor and said second adjusting MOS transistor has a third MOS transistor of the first conductivity type and a fourth MOS transistor of the second conductivity type, when setting the gate voltage of said first MOS transistor to the second reference voltage and the gate voltage of said second MOS transistor to the first reference voltage, a gate voltage of said third MOS transistor is set to the first reference voltage, and a gate voltage of said fourth MOS transistor is set to the second reference voltage.

5. An analog-to-digital converter circuit comprising:

a first analog terminal receiving an input of a first analog signal;

a first input switch inputting the first analog signal to said first analog terminal;

a second analog terminal receiving an input of a second analog signal,

a second input switch inputting the second analog signal to said second analog terminal;

a first reference voltage connecting terminal supplied with a first reference voltage;

a second reference voltage connecting terminal supplied with a second reference voltage;

a first unit including a digital-to-analog converter which generates a comparison signal serving as an object of comparison of the first analog signal, the first unit taking in and retaining the first analog signal from said first analog terminal and outputting a result of comparing the comparison signal and the first analog signal;

a second unit including a digital-to-analog converter which generates a comparison signal serving as an object of comparison of the second analog signal, the second unit taking in and retaining the second analog signal from said second analog terminal and outputting a result of comparing the comparison signal and the second analog signal;

a first switch connecting in a mutually openable/closable manner an output side of said first unit to an output side of said second digital converter; and

a comparator comparing a differential value between the first analog signal and the second analog signal with a differential value between the comparison signal of said first digital-to-analog converter and the output signal of said second digital-to-analog converter;

wherein said first digital-to-analog converter has a plurality of capacitance elements, a first set of a plurality of switches connecting respective input-side terminals of said plurality of capacitance elements to any one of said first analog terminal, said first reference voltage terminal and said second reference voltage terminal, and a first common terminal connecting in common a plurality of output-side terminals facing said respective input-side terminals of said plurality of capacitance elements,

wherein said second digital-to-analog converter has a plurality of capacitance elements, a second set of a plurality of switches connecting respective input-side terminals of said plurality of capacitance elements to any one of said second analog terminal, said first reference voltage terminal and said second reference voltage terminal, and a second common terminal connecting in common a plurality of output-side terminals facing said respective input-side terminals of said plurality of capacitance elements,

wherein said plurality of capacitance elements of said first digital-to-analog converter contains a first capacitance element having a capacitance that is equivalent to ½

a capacitance of said whole plural capacitance elements of said first digital-to-analog converter, after completing the take-in of the first analog signal, any one of said first reference voltage terminal and said second reference voltage terminals is connected to an input-side terminal of said capacitance element other than said first capacitance element on the basis of a result of the comparison by said comparator, and said first reference voltage terminal is connected to the input-side terminal of said first capacitance element irrespective of the result of the comparison by said comparator, and

wherein said plurality of capacitance elements of said second digital-to-analog converter contains a second capacitance element having a capacitance that is equivalent to ½

a capacitance of said whole plural capacitance elements of said second digital-to-analog converter, after completing the take-in of the second analog signal, any one of said first reference voltage terminal and said second reference voltage terminals is connected to an input-side terminal of said capacitance element other than said second capacitance element on the basis of the result of the comparison by said comparator, and said second reference voltage terminal is connected to the input-side terminal of said second capacitance element irrespective of the result of the comparison by said comparator.

6. The analog-to-digital converter according to claim 5, further comprising:

an input side comparator comparing a signal level of the first analog signal with a signal level of the second analog signal; and

a switch switching the first analog signal and the second analog signal depending on the result of the comparison by the input side comparator, and setting the signal level inputted to said first analog terminal higher than the signal level inputted to said second analog terminal.