Digital demodulating apparatus, controlling method of the apparatus, computer program product for the apparatus, recording medium recording thereon the product, and digital receiver

• US 20070116136A1
• Filed: 11/17/2006
• Published: 05/24/2007
• Est. Priority Date: 11/21/2005
• Status: Abandoned Application

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Kaiki, Nobuyoshi
• Application Number:
  US11/600,789
• Publication Number:
  US 20070116136A1
• Time in Patent Office: Days
• US Class Current: 375/259
• CPC Class Codes: H04L 27/2647 Arrangements specific to the receiver only equalisation H04L27/01

Abstract

A digital demodulating apparatus includes circuit elements constituting a tuner that performs channel select processing to a received signal that has been interleaved, and a demodulator that performs demodulation processing to the received signal from the tuner; a deinterleaving section that performs deinterleaving to the interleaved received signal from the tuner; and a parameter controlling section that changes the value of an operation parameter that regulates an operation of at least one of the circuit elements. The parameter controlling section determines two of the circuit elements, the quantities of changes in operation parameters of the two circuit elements, and change timings for the operation parameters of the two circuit elements, such that ranges each of which is occupied by errors to be generated in the received signal by changing the quantities of the operation parameters of the two circuit elements at the change timings for the operation parameters, do not overlap each other in the deinterleaved received signal. The parameter controlling section changes the operation parameters of the determined two circuit elements by the determined change quantities at the determined change timings.

Claims

1. A digital demodulating apparatus comprising:

a plurality of circuit elements that constitute a tuner that performs channel select processing to a received signal that has been interleaved, and a demodulator that performs demodulation processing to the received signal from the tuner;

a deinterleaving section that performs deinterleave processing to the interleaved received signal from the tuner; and

a parameter controlling section that changes the value of an operation parameter that regulates an operation of at least one of the plurality of circuit elements,

the parameter controlling section determining first and second circuit elements of the plurality of circuit elements, the quantities of changes in first and second operation parameters of the first and second circuit elements, and change timings for the first and second operation parameters of the first and second circuit elements, such that ranges each of which is occupied by errors to be generated in the received signal by changing the quantities of the operation parameters of the first and second circuit elements at the change timings for the first and second operation parameters, do not overlap each other in the received signal deinterleaved by the deinterleaving section,

the parameter controlling section then changing the operation parameters of the determined first and second circuit elements by the determined quantities of changes in the first and second operation parameters at the determined change timings for the first and second operation parameters.

2. The apparatus according to claim 1, wherein deinterleave processing to be performed by the deinterleaving section is time deinterleave processing, and

the parameter controlling section determines the change timings for the first and second operation parameters such that the change timing for the first operation parameter is temporally distant from the change timing for the second operation parameter by a length not less than a time interleaving length.

3. The apparatus according to claim 1, wherein the parameter controlling section is provided in the tuner, and

the tuner receives from the demodulator information on effective symbol length and information on time interleaving length.

4. The apparatus according to claim 1, wherein the parameter controlling section determines the first and second circuit elements, the quantities of changes in the first and second operation parameters, and the change timings for the first and second operation parameters, such that the change timing for the second operation parameter is temporally precedent to the change timing for the first operation parameter, and the total quantity of errors to be included in the received signal due to the change in the operation parameter of the first circuit element decreases by the change in the operation parameter of the second circuit element.

5. The apparatus according to claim 1, wherein the parameter controlling section determines the first circuit element, the quantity of change in the first operation parameter, and the change timing for the first operation parameter, such that a power consumption of the first circuit element after the operation of the first circuit element is changed by the quantity of change in the first operation parameter, decreases in comparison with the power consumption of the first circuit element before the operation of the first circuit element is changed by the quantity of change in the first operation parameter.

6. The apparatus according to claim 1, wherein the parameter controlling section determines the first circuit element, the quantity of change in the first operation parameter, and the change timing for the first operation parameter, such that a range in the received signal that is occupied by errors generated due to the change in the first operation parameter of the first circuit element by the quantity of change in the first operation parameter, falls within one symbol included in the received signal before deinterleave processing by the deinterleaving section.

7. The apparatus according to claim 6, wherein the parameter controlling section is provided in the tuner,

the demodulator comprises a symbol synchronization obtaining section that obtains synchronization of a symbol included in the received signal, and

the tuner receives from the demodulator information on the synchronization of the symbol obtained by the symbol synchronization obtaining section.

8. The apparatus according to claim 1, wherein the parameter controlling section determines the change timing for the first operation parameter such that the operation parameter of the first circuit element is changed at a leading edge of a symbol included in the received signal.

9. The apparatus according to claim 1, wherein the tuner comprises an RF amplifier section, a mixer section, a filter section, an IF amplifier section, and a VCO-PLL section, each of which comprises a plurality of circuit elements, and

the parameter controlling section selects at least one of the first and second circuit elements out of the circuit elements included in the RF amplifier section, the mixer section, the filter section, the IF amplifier section, and the VCO-PLL section.

10. The apparatus according to claim 9, wherein the parameter controlling section determines the second circuit element, the quantity of change in the second operation parameter, and the change timing for the second operation parameter, such that noises generated in the received signal in any of the RF amplifier section, the mixer section, the filter section, the IF amplifier section, and the VCO-PLL section, are decreased due to the change in the operation parameter of the second circuit element by the quantity of change in the second operation parameter by the operation parameter controlling section.

11. The apparatus according to claim 10, wherein the parameter controlling section determines the second circuit element, the quantity of change in the second operation parameter, and the change timing for the second operation parameter, such that the distortion characteristic of one of the RF amplifier section, the mixer section, the filter section, the IF amplifier section, and the VCO-PLL section, is improved due to the change in the operation parameter of the second circuit element by the quantity of change in the second operation parameter.

12. The apparatus according to claim 10, wherein the operation parameter of the second circuit element is electric power to be supplied to the second circuit element.

13. The apparatus according to claim 9, wherein the parameter controlling section determines the second circuit element, the quantity of change in the second operation parameter, and the change timing for the second operation parameter, such that a gain of one of the RF amplifier section and the IF amplifier section is increased due to the change in the operation parameter of the second circuit element by the quantity of change in the second operation parameter.

14. The apparatus according to claim 9, wherein the parameter controlling section determines the second circuit element, the quantity of change in the second operation parameter, and the change timing for the second operation parameter, such that a mixing signal generated by the VCO-PLL section is stable in frequency due to the change in the operation parameter of the second circuit element by the quantity of change in the second operation parameter.

15. The apparatus according to claim 1, wherein the first circuit element determined by the parameter controlling section differs in scale from the second circuit element determined by the parameter controlling section.

16. The apparatus according to claim 1, wherein the parameter controlling section determines a third circuit element of the plurality of circuit elements, the quantity of change in a third operation parameter of the third circuit element, and a change timing for the third operation parameter of the third circuit element, such that

ranges each of which is occupied by errors to be generated in the received signal by changing the operation parameters of the first and third circuit elements at the change timings for the first and third operation parameters, do not overlap each other in the received signal deinterleaved by the deinterleaving section, and

ranges each of which is occupied by errors to be generated in the received signal by changing the operation parameters of the second and third circuit elements at the change timings for the second and third operation parameters, do not overlap each other in the received signal deinterleaved by the deinterleaving section, and

the parameter controlling section changes the operation parameters of the determined first to third circuit elements by the determined quantities of change in the first to third operation parameters at the determined change timings for the first to third operation parameters.

17. The apparatus according to claim 16, wherein deinterleave processing to be performed by the deinterleaving section is time deinterleave processing, and

the parameter controlling section determines the change timings for the first and second operation parameters such that the change timings for the first to third operation parameters are temporally distant from one another by a length not less than a time interleaving length.

18. The apparatus according to claim 16, wherein the parameter controlling section determines the first to third circuit elements, the quantities of change in the first to third operation parameters, and the change timings for the first to third operation parameters, such that

(a) the change timings for the first to third operation parameters are temporally arranged in the order of the second, first, and third operation parameters;

(b) the total quantity of errors to be included in the received signal due to the changes in the operation parameters of both of the first and second circuit elements, is smaller than the total quantity of errors to be included in the received signal due to the change in the operation parameter of only the first circuit element; and

(c) the operation parameter of the first circuit element is returned to the operation parameter before the operation parameter of the first circuit element is changed, by changing the operation parameter of the third circuit element.

19. A controlling method of a digital demodulating apparatus comprising a plurality of circuit elements that constitute a tuner that performs channel select processing to a received signal that has been interleaved, and a demodulator that performs demodulation processing to the received signal from the tuner;

and a deinterleaving section that performs deinterleave processing to the interleaved received signal from the tuner,

the method comprising;

a determining step of determining first and second circuit elements of the plurality of circuit elements, the quantities of changes in first and second operation parameters of the first and second circuit elements, and change timings for the first and second operation parameters of the first and second circuit elements, such that ranges each of which is occupied by errors to be generated in the received signal by changing the quantities of the operation parameters of the first and second circuit elements at the change timings for the first and second operation parameters, do not overlap each other in the received signal deinterleaved by the deinterleaving section; and

a parameter changing step of changing the operation parameters of the first and second circuit elements determined in the changing step, by the quantities of changes in the first and second operation parameters determined in the changing step, at the change timings for the first and second operation parameters determined in the changing step.

20. A computer program product for a digital demodulating apparatus comprising a plurality of circuit elements that constitute a tuner that performs channel select processing to a received signal that has been interleaved, and a demodulator that performs demodulation processing to the received signal from the tuner;

and a deinterleaving section that performs deinterleave processing to the interleaved received signal from the tuner,

the product causing the digital demodulating apparatus to execute;

a determining step of determining first and second circuit elements of the plurality of circuit elements, the quantities of changes in first and second operation parameters of the first and second circuit elements, and change timings for the first and second operation parameters of the first and second circuit elements, such that ranges each of which is occupied by errors to be generated in the received signal by changing the quantities of the operation parameters of the first and second circuit elements at the change timings for the first and second operation parameters, do not overlap each other in the received signal deinterleaved by the deinterleaving section; and

a parameter changing step of changing the operation parameters of the first and second circuit elements determined in the changing step, by the quantities of changes in the first and second operation parameters determined in the changing step, at the change timings for the first and second operation parameters determined in the changing step.

21. A computer-readable recording medium recording thereon a computer program product for a digital demodulating apparatus comprising a plurality of circuit elements that constitute a tuner that performs channel select processing to a received signal that has been interleaved, and a demodulator that performs demodulation processing to the received signal from the tuner;

and a deinterleaving section that performs deinterleave processing to the interleaved received signal from the tuner,

the product causing the digital demodulating apparatus to execute;

a determining step of determining first and second circuit elements of the plurality of circuit elements, the quantities of changes in first and second operation parameters of the first and second circuit elements, and change timings for the first and second operation parameters of the first and second circuit elements, such that ranges each of which is occupied by errors to be generated in the received signal by changing the quantities of the operation parameters of the first and second circuit elements at the change timings for the first and second operation parameters, do not overlap each other in the received signal deinterleaved by the deinterleaving section; and

a parameter changing step of changing the operation parameters of the first and second circuit elements determined in the changing step, by the quantities of changes in the first and second operation parameters determined in the changing step, at the change timings for the first and second operation parameters determined in the changing step.

22. A digital receiver comprising a digital demodulating apparatus comprising:

a plurality of circuit elements that constitute a tuner that performs channel select processing to a received signal that has been interleaved, and a demodulator that performs demodulation processing to the received signal from the tuner;

a deinterleaving section that performs deinterleave processing to the interleaved received signal from the tuner; and

a parameter controlling section that changes the value of an operation parameter that regulates an operation of at least one of the plurality of circuit elements,

the parameter controlling section determining first and second circuit elements of the plurality of circuit elements, the quantities of changes in first and second operation parameters of the first and second circuit elements, and change timings for the first and second operation parameters of the first and second circuit elements, such that ranges each of which is occupied by errors to be generated in the received signal by changing the quantities of the operation parameters of the first and second circuit elements at the change timings for the first and second operation parameters, do not overlap each other in the received signal deinterleaved by the deinterleaving section,

the parameter controlling section then changing the operation parameters of the determined first and second circuit elements by the determined quantities of changes in the first and second operation parameters at the determined change timings for the first and second operation parameters,

the receiver performing reproduction processing for at least one of character data, image data, audio data, and program data, on the basis of the received signal demodulated by the digital demodulating apparatus.