SENSOR HYSTERESIS REDUCTION

• US 20070118318A1
• Filed: 11/09/2005
• Published: 05/24/2007
• Est. Priority Date: 11/09/2005
• Status: Active Grant

• Current Assignee: Vitesco Technologies USA, LLC (Continental AG)
• Original Assignee: Siemens VDO Automotive Corporation (Siemens AG)
• Inventors: Cripe, David
• Granted Patent: US 7,228,247 B1
• Time in Patent Office: Days
• US Class Current: 702/104
• CPC Class Codes: G01D 3/02 with provision for altering or correcting the law of variation
• CPC Class Codes: G01L 25/003 for measuring torque

Abstract

A method and circuit includes a means for reducing hysteresis in a system. The method includes the definition of boundary conditions relative to an incoming signal. The boundary conditions and the incoming signal are then utilized to determine a proper correction value. The hysteresis correction value is tailored to changes in the input signals. The modification occurs because the boundary conditions are changed depending on the input signal such that the correction values are constantly and continuously varied and implemented to accommodate changes in the input value. The constant accommodation and changing of the correction value provides a simple and effective hysteretic error accommodation that yields a substantially free hysteresis signal.

Claims

1. A method of reducing hysteresis in a sensor device, said method comprising the steps of:

(a) receiving an input signal from the sensing device;

(b) determining boundary values about the input signal;

(c) determining a correction signal based on the boundary values and the input signal;

(d) combining the correction signal with the input signal yielding a composite signal, wherein the composite signal is indicative of a signal of the sensor device substantially without hysteresis; and

(e) outputting the composite signal for use by a system.

2. The method as recited in claim 1, including maintaining the determined boundary values about the input signal responsive to the input signal remaining within a range of the boundary values.

3. The method as recited in claim 1, including redefining the boundary values responsive to the input signal being a value outside of a range of the boundary values.

4. The method as recited in claim 3, including determining the correction signal based on the redefined boundary values.

5. The method as recited in claim 1, including determining the correction signal based on previous input signals.

6. The method as recited in claim 1, including retaining previous input signal values within the determined boundary values.

7. A hysteresis correction circuit assembly for correcting a hysteresis containing signal comprising:

a comparator circuit that defines boundary conditions based on an incoming hysteresis bearing signal;

a potentiometer providing an output correction value, wherein said correction value is selected responsive to a value of said hysteresis bearing signal; and

an amplifier that combines said hysteretic bearing signal with the selected correction value to yield a composite signal.

8. The assembly as recited in claim 7, wherein said comparator is coupled to the potentiometer such that upon receipt of a hysteretic bearing signal outside of the defined boundary conditions causes an incremental change in said output correction value.

9. The assembly as recited in claim 7, wherein the comparator circuit comprises a first comparator, a second comparator and a first, second, third and forth resistors in series with a corresponding one of said first and second comparators.

10. The assembly as recited in claim 9, wherein one of said first and second comparators increments a logic state responsive to said hysteresis-bearing signal being outside the defined boundary conditions.

11. The assembly as recited in claim 7, wherein the hysteretic bearing signal comprises an input voltage, and said comparator circuit defines a voltage window symmetric about said input voltage.

12. The assembly as recited in claim 11, wherein said correction value comprises a correction voltage, and said correction voltage is incremented responsive to said input voltage being outside of the boundary conditions.

13. The assembly as recited in claim 12, wherein said correction voltage is combined with the input voltage to yield said composite signal.

14. The assembly as recited in claim 13, wherein said correction voltage is subtracted from said input voltage to yield said composite signal.