SEMICONDUCTOR CIRCUITS FOR DRIVING CURRENT-DRIVEN DISPLAY AND DISPLAY

• US 20070120784A1
• Filed: 01/31/2007
• Published: 05/31/2007
• Est. Priority Date: 04/26/2002
• Status: Active Grant

• Current Assignee: Japan Display Central Incorporated (Japan Display Incorporated)
• Original Assignee: Toshiba Matsushita Display Technology (Japan Display Incorporated)
• Inventors: TSUGE, Hitsohi
• Granted Patent: US 7,817,149 B2
• Time in Patent Office: Days
• US Class Current: 345/76
• CPC Class Codes: G09G 3/30 using electroluminescent panels
• CPC Class Codes: H03M 1/06 Continuously compensating for, or preventing, undesired influence of physical parameters periodically, e.g. by using stored correction values, H03M1/10

Abstract

In a semiconductor circuit of a current output type, when display is performed by plural semiconductor circuit in one display panel, luminance unevenness for each block with a different semiconductor circuit occurs due to fluctuation in the semiconductor circuits.

In current output stages 14a and 14b, current mirror circuits are constituted at both ends of a chip, and a reference current to be a reference of gradation display is supplied from both the ends. Moreover, by increasing a resistance value of a gate line of the current mirror circuit of distributing a current to each output, deviation of a transistor threshold value in the chip was compensated for, and output currents at left and right ends were matched. Moreover, reference currents were made the same by connecting resistors for reference current generation 11c to 11f each other at least between semiconductor circuits connected side by side, and fluctuation of current values across all semiconductor circuits decreased to 1% or less, whereby unevenness which occurred in boundaries of chips could be eliminated.

Claims

1. A driving semiconductor circuit group for a current drive type display device constituted by arranging plural driving semiconductor circuits wherein,

said driving semiconductor circuits comprises:

a drive current output mechanism having a common gate line, first and second current distributing means which are provided at both ends of said common gate line and receive input of a reference current, and plural drive current generating means which are provided along said common gate line and generate drive currents on the basis of the reference current to be distributed from said current distributing means in a current mirror system; and

reference current generating means which are provided in the vicinity of said current distributing means and generate the reference current from a reference voltage signal having a reference voltage and predetermined power supplies having a voltage higher than the reference voltage, wherein

said plural driving semiconductor circuits are arranged, such that the ends of said common gate line of the respective driving semiconductor circuits are adjacent to each other,

and wherein a pair of the reference current generating means adjacent to each other in a pair of said driving semiconductor circuits adjacent to each other acquire the predetermined power supplies from the opposed driving semiconductor circuits each other and generate the reference current from the predetermined power supplies and the reference voltage signal to be supplied to said driving driving semiconductor circuits,

said driving semiconductor circuit at least includes plural resistance elements connected in series which are provided between said predetermined power supplies of each of said pair of reference current generating means adjacent to each other and said pair of reference current generating means corresponding to the supplies, respectively, and

a part of said plural resistance elements connected in series are formed on a chip of one of said pair of driving semiconductor circuit adjacent to each other, and the remainder of said plural resistance elements are formed on a chip of the other of said pair of driving semiconductor circuits adjacent to each other.