Automatic yielding on lock contention for a multi-threaded processor

• US 20070124546A1
• Filed: 11/29/2005
• Published: 05/31/2007
• Est. Priority Date: 11/29/2005
• Status: Abandoned Application

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Blanchard, Anton, Russell, Paul
• Application Number:
  US11/289,235
• Publication Number:
  US 20070124546A1
• Time in Patent Office: Days
• US Class Current: 711/152
• CPC Class Codes: G06F 12/084 with a shared cache
• CPC Class Codes: G06F 9/526 Mutual exclusion algorithms

Abstract

A method and system are provided for managing processor resources in a multi-threaded processor. When attempting to acquire a lock on resources available in the cache, tests are conducted to determine if there is a lock on the resource as well as a state of the cache associated with the resource. If it is determined that the lock is in use by another thread, the lock requesting thread may spin on the lock. In limited circumstances a high priority may be assigned to the lock holding thread and a low priority may be assigned to the thread spinning on the lock. Processor resources are proportionally assigned to the threads based upon the assigned priorities, thereby allowing the processor to allocate more resources to a thread assigned a high priority and fewer resources to a thread assigned a low priority.

Claims

1. A method for mitigating overhead on a multi-threaded processor, comprising:

remembering a cache state of a memory location on a processor when loading a lock value; and

adjusting allocation of processor resources to a lock holding thread on said processor responsive to said remembered cache state having a value selected from a group consisting of;

modified and shared.

2. The method of claim 1, wherein said lock value is loaded from a reservation table.

3. The method of claim 2, wherein said reservation table is stored in volatile memory.

4. The method of claim 1, wherein the step of adjusting allocation of processor resources includes assigning a high priority level to a thread holding said lock.

5. The method of claim 1, wherein the step of adjusting allocation of processor resources includes assigning a low priority level to a non-lock holding thread.

6. A computer system comprising:

a multi-threaded processor;

a manager adapted to remember a cache state of a memory location on said processor associated with a lock value; and

said processor adapted to adjust allocation of resources to a lock holding thread with said cache state having a value selected from a group consisting of;

modified and shared.

7. The system of claim 6, wherein said lock value is loaded from a reservation table.

8. The system of claim 7, wherein said reservation table is stored in volatile memory.

9. The system of claim 6, further comprising a priority level of a thread holding said lock adapted to be increased.

10. The system of claim 6, further comprising a priority level of a non-lock holding thread adapted to be decreased.

11. An article comprising:

a computer readable medium;

instructions in said medium for loading a lock value;

instructions in said medium for remembering a cache state of a memory location on a processor when loading said lock value; and

instructions in said medium for adjusting allocation of processor resources to a lock holding thread on said processor responsive to said remembered cache state having a value selected from a group consisting of;

modified and shared.

12. The article of claim 11, wherein said lock value is loaded from a reservation table.

13. The article of claim 12, wherein said reservation table is stored in volatile memory.

14. The article of claim 11, wherein the instructions for adjusting allocation of processor resources to another thread on said processor includes increasing a priority level of a thread holding said lock.

15. The article of claim 11, wherein the instructions for adjusting allocation of processor resources to another thread on said processor includes lowering a priority level of a non-lock holding thread.