IMPLEMENTATION OF THERMAL THROTTLING LOGIC

• US 20070124622A1
• Filed: 06/21/2006
• Published: 05/31/2007
• Est. Priority Date: 11/29/2005
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: JOHNS, CHARLES, WANG, MICHAEL
• Granted Patent: US 7,721,128 B2
• Time in Patent Office: Days
• US Class Current: 713/501
• CPC Class Codes: G01K 3/005 Circuits arrangements for indicating a predetermined temperature fire detection G08B17/00
• CPC Class Codes: G01K 7/015 using microstructures, e.g. made of silicon
• CPC Class Codes: G06F 1/206 comprising thermal management
• CPC Class Codes: G06F 1/324 by lowering clock frequency
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A computer implemented method, data processing system, and processor are provided for implementation of thermal throttling logic. A sensed temperature value is received from a digital thermal sensor representing a current temperature of a unit associated with the digital thermal sensor in the integrated circuit. The sensed temperature is reported as the current temperature in a status register. The unit in the integrated circuit is throttled in response to the current temperature exceeding a first predetermined value.

Claims

1. A computer implemented method for implementing thermal throttling logic in an integrated circuit, comprising:

receiving a sensed temperature value from at least one digital thermal sensor representing a current temperature of at least one unit associated with the digital thermal sensor in the integrated circuit;

reporting the sensed temperature as the current temperature in a status register; and

responsive to the current temperature exceeding a first predetermined value, throttling the at least one unit in the integrated circuit.

2. The method of claim 1, wherein the receiving, reporting, and throttling steps are performed by a thermal management control state machine residing within the integrated circuit.

3. The method of claim 1, wherein the first predetermined value is a setting for a throttling temperature.

4. The method of claim 1, further comprising:

receiving a new sensed temperature from the digital thermal sensor;

determining if the new sensed temperature is less than a second predetermined value; and

responsive to the new sensed temperature meeting the second predetermined value, disabling a throttling mode in the integrated circuit.

5. The method of claim 4, wherein the second predetermined value is a setting for a disabling throttling temperature.

6. The method of claim 4, wherein the throttling mode includes a type of throttling mode to be initiated, an amount of throttling to be initiated, and a duration for the throttling mode to be initiated.

7. The method of claim 6, wherein the type of throttling mode is at least one of dynamic throttling disabled, normal operation, power processor element or synergistic processor element is always throttled, core stop safety disabled, or power processor element or synergistic processor element is always throttled and core stop safety disabled.

8. The method of claim 6, wherein the amount of throttling initiated is a percentage of time that the at least one unit is stopped versus time that the at least one unit is run.

9. The method of claim 6, wherein the duration for the throttling mode to be initiated is an actual number of clock cycles that the at least one unit stops and runs.

10. The method of claim 1, further comprising:

monitoring for the issuance of an interrupt;

disabling the throttling mode so that the interrupt may be handled; and

responsive to the interrupt being handled, enabling the throttling mode.

11. The method of claim 1, wherein the integrated circuit is a heterogeneous multi-core processor.

12. The method of claim 11, wherein the digital thermal sensor resides within one of the cores of the heterogeneous multi-core processor.

13. The method of claim 11, wherein the digital thermal sensor resides within the heterogeneous multi-core processor, but not within a core.

14. A data processing system comprising:

a bus;

a memory coupled to the bus, wherein the memory includes a set of instructions; and

a integrated circuit coupled to the bus, wherein the integrated circuit executes the set of instructions to receive a sensed temperature value from at least one digital thermal sensor representing a current temperature of at least one unit associated with the digital thermal sensor in the integrated circuit;

report the sensed temperature as the current temperature in a status register; and

throttle the at least one unit in the integrated circuit in response to the current temperature exceeding a first predetermined value.

15. The system of claim 14, wherein the integrated circuit executes the set of instructions to receive a new sensed temperature from the digital thermal sensor;

determine if the new sensed temperature is less than a second predetermined value; and

disable a throttling mode in the integrated circuit in response to the new sensed temperature meeting the second predetermined value.

16. The system of claim 15, wherein the first predetermined value is a setting for a throttling temperature and wherein the second predetermined value is a setting for a disabling throttling temperature.

17. The system of claim 14, wherein the integrated circuit executes the set of instructions to monitor for the issuance of an interrupt;

disable the throttling mode so that the interrupt may be handled; and

enable the throttling mode in response to the interrupt being handled,.

18. A processor, comprising:

at least one processing core;

a thermal management control state machine;

a comparator; and

a digital thermal sensor, wherein the processor executes the set of instructions to receive a sensed temperature value from at least one digital thermal sensor representing a current temperature of at least one unit associated with the digital thermal sensor in the integrated circuit;

report, using the state machine, the sensed temperature as the current temperature in a status register; and

throttle, using the state machine, the at least one unit in the integrated circuit in response to the current temperature exceeding a first predetermined value.

19. The processor of claim 18, wherein the processor executes the set of instructions to receive a new sensed temperature from the digital thermal sensor;

determine, using the state machine, if the new sensed temperature is less than a second predetermined value; and

disable, using the state machine, a throttling mode in the integrated circuit in response to the new sensed temperature meeting the second predetermined value.

20. The processor of claim 18, wherein the processor executes the set of instructions to monitor, using the state machine, for the issuance of an interrupt;

disable, using the state machine, the throttling mode so that the interrupt may be handled; and

enable, using the state machine, the throttling mode in response to the interrupt being handled.