Semiconductor device

• US 20070126059A1
• Filed: 12/01/2006
• Published: 06/07/2007
• Est. Priority Date: 12/02/2005
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Atsumi, Tomoaki, Dembo, Hiroki
• Granted Patent: US 8,083,128 B2
• Time in Patent Office: Days
• US Class Current: 257/344
• CPC Class Codes: G06K 19/0723 the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
• CPC Class Codes: G06K 7/0008 General problems related to the reading of electronic memory record carriers, independent of its reading method, e.g. power transfer
• CPC Class Codes: G06K 7/10029 the collision being resolved in the time domain, e.g. using binary tree search or RFID responses allocated to a random time slot
• CPC Class Codes: H01L 27/092 complementary MIS field-effect transistors
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1266 the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
• CPC Class Codes: H01L 27/13 combined with thin-film or thick-film passive components

Abstract

An object is to provide a semiconductor device which includes an anti-collision function during or after production of an IC chip just by a change of a program, even when there is a change of a specification of a product accompanying a change of the kind or standard of a signal of a wireless means for each product. A semiconductor device includes an arithmetic circuit and a circuit for transmitting/receiving a signal to/from outside. The arithmetic circuit includes a central processing unit, a random access memory, a read only memory, and a controller. The read only memory stores a program for processing collision avoidance in transmitting/receiving the signal to/from outside. The program is executed in the central processing unit, so that the arithmetic circuit processes collision avoidance.

Claims

1. A semiconductor device comprising:

a circuit for transmitting a plurality of first signals to outside of the semiconductor device by wireless or for wirelessly receiving a plurality of second signals from outside of the semiconductor device by wireless;

a memory storing a program to avoid a collision of the plurality of first signals or the plurality of second signals; and

a central processing unit to execute the program.

2. The semiconductor device according to claim 1, wherein the wireless is radio frequency.

3. The semiconductor device according to claim 1, wherein the program comprises a plurality of routines.

4. The semiconductor device according to claim 1, further comprising an auxiliary arithmetic circuit to execute the program.

5. The semiconductor device according to claim 1, wherein each of the plurality of first signals comprises a start code of a frame, a flag code, a command code, a data code, a cyclic redundancy check code, and an end code of a frame.

6. The semiconductor device according to claim 1, wherein the circuit comprises at least one of an antenna, a resonant circuit, a power supply circuit, a reset circuit, a clock generating circuit, a demodulation circuit, a modulation circuit, and a power source managing circuit.

7. The semiconductor device according to claim 1, wherein the semiconductor device is at least one of a ID chip, an IC tag, an ID tag, an RF tag, a wireless tag, an electronic tag, and a transponder.

8. A semiconductor device comprising:

a circuit for transmitting a plurality of first signals to outside of the semiconductor device by wireless or for receiving a plurality of second signals from outside of the semiconductor device by wireless;

a memory storing a program to avoid a collision of the plurality of first signals or the plurality of second signals;

a central processing unit to execute the program; and

a controller to provide the central processing unit with a mask length code,

wherein the program comprises a first routine to determine a flag of the plurality of the first signals or a command of the plurality of the first signals, a second routine to determine the mask length code, a third routine to execute a cyclic redundancy check of data code included in the each of the plurality of first signals, a fourth routine to determine the number of the plurality of first signals or the number of the plurality of second signals.

9. The semiconductor device according to claim 8, wherein the wireless is radio frequency.

10. The semiconductor device according to claim 8, further comprising an auxiliary arithmetic circuit to execute the program.

11. The semiconductor device according to claim 8, wherein each of the plurality of first signals comprises a start code of a frame, a flag code, a command code, a data code, a cyclic redundancy check code, and an end code of a frame.

12. The semiconductor device according to claim 8, wherein the circuit comprises at least one of an antenna, a resonant circuit, a power supply circuit, a reset circuit, a clock generating circuit, a demodulation circuit, a modulation circuit, and a power source managing circuit.

13. The semiconductor device according to claim 8, wherein the controller comprises at least one of a CPU interface, a control register, a code extracting circuit, and an encoding circuit.

14. The semiconductor device according to claim 8, wherein the semiconductor device is at least one of a ID chip, an IC tag, an ID tag, an RF tag, a wireless tag, an electronic tag, and a transponder.

15. A semiconductor device comprising:

a circuit for transmitting a plurality of first signals to outside of the semiconductor device or for receiving a plurality of second signals from outside of the semiconductor device;

a memory storing a program to avoid a collision of the plurality of first signals or the plurality of second signals;

a central processing unit to execute the program; and

a controller to provide the central processing unit with a mask length code, the controller comprises a control register,

wherein each of the plurality of first signals comprises a start code of a frame, and

wherein the program is executed when the control register determines the start code of a frame.

16. The semiconductor device according to claim 15, wherein the wireless is radio frequency.

17. The semiconductor device according to claim 15, wherein the program comprises a first routine to determine a flag of the plurality of the first signals or a command of the plurality of the first signals, a second routine to determine the mask length code, a third routine to execute a cyclic redundancy check of data code included in the each of the plurality of first signals, a fourth routine to determine the number of the plurality of first signals or the number of the plurality of second signals.

18. The semiconductor device according to claim 15, further comprising an auxiliary arithmetic circuit to execute the program.

19. The semiconductor device according to claim 15, wherein each of the plurality of first signals comprises a start code of a frame, a flag code, a command code, a data code, a cyclic redundancy check code, and an end code of a frame.

20. The semiconductor device according to claim 15, wherein the circuit comprises at least one of an antenna, a resonant circuit, a power supply circuit, a reset circuit, a clock generating circuit, a demodulation circuit, a modulation circuit, and a power source managing circuit.

21. The semiconductor device according to claim 15, wherein the controller comprises at least one of a CPU interface, a control register, a code extracting circuit, and an encoding circuit.

22. The semiconductor device according to claim 15, wherein the semiconductor device is at least one of a ID chip, an IC tag, an ID tag, an RF tag, a wireless tag, an electronic tag, and a transponder.