Flat panel display, fabricating method thereof, fabricating apparatus thereof, picture quality controlling method thereof, picture quality controlling apparatus

• US 20070126460A1
• Filed: 06/30/2006
• Published: 06/07/2007
• Est. Priority Date: 12/02/2005
• Status: Active Grant

• Current Assignee: LG Display Co., Ltd.
• Original Assignee: LG Philips LCD Company Limited (LG Display Co., Ltd.)
• Inventors: Chung, In, Nam, Seung, Hwang, Jong, Yoo, Soon, Lee, Deuk
• Granted Patent: US 7,990,356 B2
• Time in Patent Office: Days
• US Class Current: 345/98
• CPC Class Codes: G09G 2330/10 Dealing with defective pixels
• CPC Class Codes: G09G 3/006 Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence

Abstract

A flat panel display, a fabricating method thereof, a fabricating apparatus thereof, a picture quality controlling method thereof and a picture quality controlling apparatus for reducing a recognizing degree of a defective pixel and electrically compensating a charging characteristics of the defective pixel are provided. In the flat panel display, a display panel has a plurality of pixels. A defective pixel is electrically connected to an adjacent normal pixel. A memory stores a location data that indicates a location of the link pixel and a compensation data that compensates for charging characteristics of the link pixel. A compensation circuit modulates a digital video data to be displayed on the link pixel on the basis of the location data and the compensation data.

Claims

1. A flat panel display, comprising:

a display panel that includes a plurality of data lines and a plurality of scan lines that cross each other,

a plurality of pixels, wherein a defective pixel is electrically connected to a normal pixel that is adjacent;

a memory that stores a location data that indicates a location of a link pixel and a compensation data that compensates for a charging characteristics of the link pixel; and

a compensation circuit that modulates a digital video data to be displayed on the link pixel on the basis of the location data and the compensation data.

2. The flat panel display as claimed in claim 1, wherein a normal pixel that is adjacent with the defective pixel displays the same color as a color displayed by the defective pixel.

3. The flat panel display as claimed in claim 1, wherein the compensation data is set in accordance with a gray scale of a data to be displayed at the link pixel.

4. The flat panel display as claimed in claim 1, further comprising:

a plurality of switch devices formed at an area defined by an intersection between the data lines and the scan lines to supply a data signal from the data line to pixels that includes the link pixel,

wherein a current path between the defective pixel and the switch device is shorted.

5. The flat panel display as claimed in claim 1, further comprising:

a data drive circuit that converts a digital video data modulated by the compensation circuit and a un-modulated digital video data into an analog data signal to supply to the data lines;

a scan drive circuit that supplies a scan signal to the scan lines;

the data drive circuit that supplies the digital video data to the data drive circuit; and

a timing controller controls the scan drive circuit.

6. The flat panel display as claimed in claim 1, wherein the compensation circuit is integrated within the timing controller.

7. The flat panel display as claimed in claim 1, wherein the memory includes EEPROM.

8. The flat panel display as claimed in claim 1, wherein the compensation circuit increases and decreases the compensation data into a digital video data to be displayed at the link pixel.

9. The flat panel display as claimed in claim 1, wherein said display panel is either a display panel of a liquid crystal display device or a display panel of an organic light emitting diode.

38. The flat panel display as claimed in claim 1, wherein said memory includes EDID ROM.

10. A method of fabricating a flat panel display, comprising the acts of:

supplying a test data and a test scan signal to the data electrodes of the flat panel display in the inspection process of the flat panel display to inspect an existence or nonexistence of a defective pixel in the flat panel display;

electrically connecting a normal pixel that is adjacent with the defective pixel to the defective pixel to form a link pixel;

measuring a charging characteristics of the link pixel;

determining a location data that indicates a location of the link pixel and a compensation data for compensating a charging characteristics of the link pixel; and

storing the location data and the compensation data into a data modulation memory of the flat panel display in a compensation data recording process of the flat panel display.

11. The method as claimed in claim 10, wherein a normal pixel that is adjacent with the defective pixel displays the same color as a color displayed by the defective pixel.

12. The method as claimed in claim 10, wherein the compensation data is set in accordance with a gray scale of a data to be displayed at the link pixel.

13. The method as claimed in claim 10, wherein the memory includes a nonvolatile memory that is adaptive for renewing a data.

14. The method as claimed in claim 13, wherein said memory includes EEPROM.

15. The method as claimed in claim 10, further comprising:

modulating a digital video data displayed at the link pixel by using a location data and a compensation data stored at the memory.

16. The method as claimed in claim 10, wherein the flat panel display includes a plurality of switch devices formed in an area by intersection between the data lines and the scan lines to supply a data signal from the data line to pixels that includes the link pixel.

17. The method as claimed in claim 16, wherein the act of forming the link pixel includes:

shorting a current path between the defective pixel and the switch device; and

electrically connecting a pixel electrode of the defective pixel separated from, by an insulating film, a pixel electrode of a normal pixel that is adjacent by using a W-CVD process.

18. The method as claimed in claim 16, wherein the act of forming the link pixel includes:

forming a link pattern that overlaps at least a portion of the link pattern with a pixel electrode of the defective pixel and a pixel electrode of a normal pixel that is adjacent with the defective pixel and has an insulating film therebetween at a display panel of the flat panel display;

shorting a current path between the defective pixel and the switch device; and

radiating a laser into each side of the link pattern to electrically connect a pixel electrode of the defective pixel separated, by an insulating film, from a pixel electrode of a normal pixel that is adjacent by the link pattern.

19. The method as claimed in claim 18, wherein the link pattern is formed with the scan line on the same layer as the scan line.

20. The method as claimed in claim 19, wherein the link pattern is connected to the scan line.

21. The method as claimed in claim 20, further comprising:

disconnecting the link pixel and the scan line from each other.

22. The method as claimed in claim 18, wherein the link pattern is formed with the data line on the same layer as the data line.

39. The method as claimed in claim 13, wherein said memory includes EDID ROM

23. A fabricating apparatus of a flat panel display, comprising:

an inspection device that supplies a test data and a test scan signal to the data electrodes of the flat panel display in the inspection process of the flat panel display to inspect an existence or nonexistence of a defective pixel in the flat panel display;

a repair device that electrically connects a normal pixel that is adjacent with the defective pixel to the defective pixel to form a link pixel; and

an electric charging compensation device that determines a compensation data compensating a charging characteristics of the link pixel on the basis of the charging characteristics of the link pixel, that determines a location data that indicates a location of the link pixel and stores the location data and the compensation data into a data modulation memory of the flat panel display.

24. A method of controlling a picture quality of a flat panel display, in the method of controlling the picture quality of the flat panel display panel having a link pixel such that a plurality of data lines and a plurality of scan lines cross each other, a plurality of pixels are arranged, and a defective pixel is electrically connected to an adjacent normal pixel, comprising the acts of:

storing a location data that indicates a location of the link pixel and a compensation data that compensates for charging characteristics of the link pixel into a memory; and

modulating the location data and a digital video data to be displayed at the link pixel on the basis of the location data and the compensation data.

25. The method as claimed in claim 24, wherein a normal pixel adjacent with the defective pixel displays the same color as a color displayed by the defective pixel.

26. The method as claimed in claim 24, wherein the compensation data is set in accordance with a gray scale of a data to be displayed at the link pixel.

27. The method as claimed in claim 24, wherein the flat panel display further includes a plurality of switch devices formed at an area defined by an intersection between the data lines and the scan lines to supply a data signal from the data line to pixels that include the link pixel,

wherein a current path between the defective pixel and the switch device is shorted.

28. The method as claimed in claim 24, further comprising:

converting a digital video data modulated by the compensation circuit and a un-modulated digital video data into an analog data signal to supply to the data lines; and

supplying a scan signal to the scan lines.

29. The method as claimed in claim 24, wherein the memory includes EEPROM.

30. The method as claimed in claim 24, wherein the act of modulating the digital video data includes increasing and decreasing the compensation data at a digital video data to be displayed at the link pixel.

40. The method as claimed in claim 24, wherein said memory includes EDID ROM.

31. A picture quality controlling apparatus of a flat panel display, in the method of controlling the picture quality of the flat panel display panel having a link pixel such that a plurality of data lines and a plurality of scan lines cross each other, a plurality of pixels are arranged, and a defective pixel is electrically connected to an adjacent normal pixel, comprising:

a memory stored a location data that indicates a location of the link pixel and a compensation data that compensates a charging characteristics of the link pixel into a memory; and

a compensation circuit that modulates the location data and a digital video data to be displayed at the link pixel on the basis of the location data and the compensation data.

32. The picture quality controlling apparatus of the flat panel display as claimed in claim 31, wherein a normal pixel adjacent with the defective pixel displays the same color as a color displayed by the defective pixel.

33. The picture quality controlling apparatus of the flat panel display as claimed in claim 31, wherein the compensation data is set in accordance with a gray scale of a data to be displayed at the link pixel.

34. The picture quality controlling apparatus of the flat panel display as claimed in claim 31, wherein the flat panel display further includes a plurality of switch devices formed at an area defined by an intersection between the data lines and the scan lines to supply a data signal from the data line to pixels that includes the link pixel,

wherein a current path between the defective pixel and the switch device is shorted.

35. The picture quality controlling apparatus of the flat panel display as claimed in claim 31, further comprising:

converting a digital video data modulated by the compensation circuit and a un-modulated digital video data into an analog data signal to supply to the data lines; and

supplying a scan signal to the scan lines.

36. The picture quality controlling apparatus of the flat panel display as claimed in claim 31, wherein said memory includes EEPROM.

37. The picture quality controlling apparatus of the flat panel display as claimed in claim 31, wherein the compensation circuit increases and decreases the compensation data at a digital video data to be displayed at the link pixel.

41. The picture quality controlling apparatus of the flat panel display as claimed in claim 31, wherein said memory includes EDID ROM.