Method and system for speed negotiation for twisted pair links using intelligent E-FIFO in fibre channel systems

• US 20070133562A1
• Filed: 07/24/2006
• Published: 06/14/2007
• Est. Priority Date: 12/02/2005
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Ghiasi, Ali
• Granted Patent: US 8,306,070 B2
• Time in Patent Office: Days
• US Class Current: 370/395.420
• CPC Class Codes: H04L 49/3054 Auto-negotiation, e.g. access control between switch gigabit interface connector [GBIC] and link
• CPC Class Codes: H04L 49/357 Fibre channel switches

Abstract

Certain aspects of a method and system for speed negotiation for twisted pair links using intelligent elastic first-in-first-out (E-FIFO) in fibre channel systems are disclosed. Aspects of a method may include determination of a priority level based on amount of data in at least one elastic FIFO (E-FIFO) buffer communicatively coupled to at least one of the fibre channel host devices. The E-FIFO buffer may be modified either by insertion or deletion of IDLE words or words from an order set based on the determined priority level. The data may be synchronously communicated between fibre channel host devices communicatively coupled via the twisted pair link based on the modified elastic buffer.

Claims

1. In a fibre channel system comprising fibre channel host devices communicatively coupled via a twisted pair link, a method for handling data in a communication system, the method comprising:

determining a priority level based on amount of data in at least one elastic buffer communicatively coupled to at least one fibre channel host device;

modifying said at least one elastic buffer communicatively coupled to said at least one fibre channel host device based on said determined priority level; and

communicating data synchronously between said fibre channel host devices communicatively coupled via said twisted pair link based on said modified elastic buffer.

2. The method according to claim 1, comprising modifying said at least one elastic buffer if said determined priority level indicates that said elastic buffer is empty by inserting at least one word from an order set comprising:

an IDLE, an alternate to IDLE ARB(ff), ARB(fb) for blocking ARB, ARB(src_alpha) for address assignment, no operating system (NOS), offline state (OLS), link reset (LR), link reset response (LRR), loop initialization primitive (LIP), loop port bypass (LPB), and loop port enable (LPE).

3. The method according to claim 1, comprising modifying said at least one elastic buffer if said determined priority level indicates that said elastic buffer is empty by inserting at least one current fill word after any fill word in said elastic buffer.

4. The method according to claim 1, wherein said at least one elastic buffer is an elastic first-in first-out (FIFO) buffer.

5. The method according to claim 1, comprising modifying said at least one elastic buffer if said determined priority level indicates a low priority deletion operation by deleting a next fill word if at least four fill words are inserted with no intervening data words.

6. The method according to claim 5, comprising if said determined priority level indicates said low priority deletion operation and if a current fill word changes to IDLE while a deletion operation is pending, not deleting a first IDLE word.

7. The method according to claim 5, comprising at least one of:

re-entering said determined priority level that indicates said low priority deletion operation after waiting for at least four fill words before another deletion operation, and entering said determined priority level that indicates a quiescent operation with no deletion operation pending.

8. The method according to claim 5, comprising modifying said at least one elastic buffer if said determined priority level indicates a high priority deletion operation by deleting a next fill word if at least two fill words are inserted with no intervening data words.

9. The method according to claim 5, comprising if said determined priority level indicates said high priority deletion operation and if a current fill word changes to IDLE while a deletion operation is pending, not deleting a first IDLE word.

10. The method according to claim 5, comprising at least one of:

entering said determined priority level that indicates said low priority deletion operation and waiting for at least four fill words before another deletion operation, and re-entering said determined priority level that indicates a high priority deletion operation and waiting for at least two fill words before another deletion operation.

11. The method according to claim 1, comprising operating said at least one elastic buffer on a transmit path of said twisted pair link from at least one of:

a reference clock and a derived clock.

12. The method according to claim 1, comprising operating at least one of said fibre channel host devices as a master host device.

13. The method according to claim 12, comprising operating at least one of said fibre channel host devices as a slave host device.

14. The method according to claim 13, comprising operating said at least one elastic buffer in said slave host device from a recovered clock.

15. The method according to claim 12, comprising operating said at least one elastic buffer in said master host device from a reference clock.

16. A system for handling data in a fibre channel system comprising fibre channel host devices communicatively coupled via a twisted pair link, the system comprising:

circuitry that enables determination of a priority level based on amount of data in at least one elastic buffer communicatively coupled to at least one fibre channel host device;

circuitry that enables modification of said at least one elastic buffer communicatively coupled to said at least one fibre channel host device based on said determined priority level; and

circuitry that enables communication of data synchronously between said fibre channel host devices communicatively coupled via said twisted pair link based on said modified elastic buffer.

17. The system according to claim 16, comprising circuitry that enables insertion of at least one word from an order set comprising:

an IDLE, an alternate to IDLE ARB(ff), ARB(fb) for blocking ARB, ARB(src_alpha) for address assignment, no operating system (NOS), offline state (OLS), link reset (LR), link reset response (LRR), loop initialization primitive (LIP), loop port bypass (LPB), and loop port enable (LPE), if said determined priority level indicates that said at least one elastic buffer is empty.

18. The system according to claim 16, comprising circuitry that enables insertion of at least one current fill word after any fill word in said elastic buffer, if said determined priority level indicates that said at least one elastic buffer is empty.

19. The system according to claim 16, wherein said at least one elastic buffer is an elastic first-in first-out (FIFO) buffer.

20. The system according to claim 16, comprising circuitry that enables deletion of a next fill word in said at least one elastic buffer if at least four fill words are inserted with no intervening data words, and if said determined priority level indicates a low priority deletion operation.

21. The system according to claim 20, comprising circuitry that disables deletion of a first IDLE word if said determined priority level indicates said low priority deletion operation, and if a current fill word changes to IDLE while a deletion operation is pending.

22. The system according to claim 20, comprising circuitry that enables at least one of:

re-entering said determined priority level that indicates said low priority deletion operation after waiting for at least four fill words before another deletion operation, and entering said determined priority level that indicates a quiescent operation with no deletion operation pending.

23. The system according to claim 20, comprising circuitry that enables deletion of a next fill word if at least two fill words are inserted with no intervening data words, and if said determined priority level indicates a high priority deletion operation.

24. The system according to claim 20, comprising circuitry that disables deletion of a first IDLE word if said determined priority level indicates said high priority deletion operation and if a current fill word changes to IDLE while a deletion operation is pending.

25. The system according to claim 20, comprising circuitry that enables at least one of:

entering said determined priority level that indicates said low priority deletion operation and waiting for at least four fill words before another deletion operation, and re-entering said determined priority level that indicates a high priority deletion operation and waiting for at least two fill words before another deletion operation.

26. The system according to claim 16, comprising circuitry that enables operation of said elastic buffer on a transmit path of said twisted pair link from at least one of:

a reference clock and a derived clock.

27. The system according to claim 16, comprising circuitry that enables operation of at least one of said fibre channel host devices as a master host device.

28. The system according to claim 27, comprising circuitry that enables operation of at least one of said fibre channel host devices as a slave host device.

29. The system according to claim 28, comprising circuitry that enables operation of said at least one elastic buffer in said slave host device from a recovered clock.

30. The system according to claim 27, comprising circuitry that enables operation of said at least one elastic buffer in said master host device from a reference clock.