Inhibiting underfill flow using nanoparticles

• US 20070134937A1
• Filed: 12/14/2005
• Published: 06/14/2007
• Est. Priority Date: 12/14/2005
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: See, Chun, Lim, Szu
• Granted Patent: US 7,317,257 B2
• Time in Patent Office: Days
• US Class Current: 438/775
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: H01L 21/563 Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/26175 Flow barriers
• CPC Class Codes: H01L 2224/27013 for holding or confining the layer connector, e.g. solder flow barrier
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/73203 Bump and layer connectors
• CPC Class Codes: H01L 2224/73204 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2224/83051 Forming additional members, e.g. dam structures
• CPC Class Codes: H01L 2224/83102 using surface energy, e.g. capillary forces
• CPC Class Codes: H01L 2224/92125 the second connecting process involving a layer connector
• CPC Class Codes: H01L 23/295 containing a filler H01L23/296 takes precedence
• CPC Class Codes: H01L 24/29 of an individual layer connector
• CPC Class Codes: H01L 24/32 of an individual layer connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/19041 being a capacitor
• CPC Class Codes: H01L 2924/19105 : in a side-by-side arrangement on a common die mounting substrate
• CPC Class Codes: H01L 2924/3512 : Cracking

Abstract

A method and apparatus for inhibiting the flow of a flowable adhesive material disposed adjacent to a substrate. A chip component is disposed adjacent to a substrate and a plurality of nanoparticles are disposed and cured adjacent to the substrate and proximate to the chip component. The nanoparticles possess surface properties that make them substantially immiscible with a flowable adhesive. The band of nanoparticles will inhibit the flow of a flowable adhesive material disposed between the chip and the nanoparticles, in a direction bounded by the plurality of nanoparticles, while adhesive flow in the direction of the component is promoted.

Claims

1. A method, comprising:

disposing a component adjacent to a substrate;

disposing a plurality of nanoparticles adjacent to the substrate and proximate to at least one side of the component; and

disposing a flowable adhesive material adjacent to the substrate between the component and the plurality of nanoparticles, the nanoparticles being substantially immiscible with the adhesive material.

2. The method of claim 1, wherein the plurality of nanoparticles comprise at least one of silicone nanoparticles and fluorocarbon nanoparticles.

3. The method of claim 1, wherein the nanoparticles comprise ceramic nanoparticles, and the outer surface of the nanoparticles including at least one of silicone branch tails and fluorocarbon branch tails.

4. The method of claim 1, wherein the plurality of nanoparticles are disposed in a plurality of layers.

5. The method of claim 1, wherein the flowable adhesive material comprises an epoxy underfill material.

6. The method of claim 1, wherein the component comprises at least one of a flip chip component or a controlled collapse chip connect (C4) component.

7. The method of claim 1, wherein the nanoparticles are smaller than filler particles in the adhesive material.

8. The method of claim 1, wherein the plurality of nanoparticles further comprise nanopores.

9. The method of claim 1, wherein the plurality of nanoparticles are disposed by at least one of masking, spray deposition, and vapor deposition.

10. The method of claim 1, further comprising curing the disposed plurality of nanoparticles by at least one of heat and radiation.

11. An apparatus, comprising:

a substrate;

a component disposed adjacent to the substrate;

a plurality of nanoparticles disposed adjacent to the substrate and proximate to at least a first side of the component;

the nanoparticles each having an outer surface, the outer surface having a characteristic of being substantially immiscible with a flowable adhesive material.

12. The apparatus of claim 11, wherein the nanoparticles comprise at least one of silicone and fluorocarbon.

13. The apparatus of claim 11, wherein the nanoparticles comprise ceramic nanoparticles, the outer surface of the nanoparticles including at least one of silicone branch tails or fluorocarbon branch tails.

14. The apparatus of claim 11, wherein the plurality of nanoparticles is disposed in a plurality of layers.

15. The apparatus of claim 11, wherein the component comprises at least one of a flip chip component or a controlled collapse chip connect (C4) component.

16. The apparatus of claim 11, wherein the plurality of nanoparticles further comprises nanopores.

17. The apparatus of claim 11, wherein the nanoparticles are smaller than filler particles in the flowable adhesive material.

18. The apparatus of claim 11, wherein the plurality of nanoparticles inhibit the flow of the flowable adhesive material in a direction bounded by the nanoparticles.

19. An assembly, comprising:

a substrate;

a chip component disposed adjacent to the substrate;

a plurality of nanoparticles disposed adjacent to the substrate and proximate to at least a first side of the chip component, the nanoparticles each having an outer surface, the outer surface of the nanoparticles having a characteristic of being substantially immiscible with a flowable adhesive material;

another component disposed adjacent to the substrate proximate to a side of the nanoparticles opposite the chip component, the nanoparticles forming a boundary between the chip component and the other component; and

a flowable adhesive disposed adjacent to the substrate and between the chip component and the nanoparticles.

20. The assembly of claim 19, wherein the plurality of nanoparticles are disposed as a plurality of layers.

21. The assembly of claim 19, wherein the plurality of nanoparticles comprise a boundary feature capable of substantially inhibiting the flow of the flowable adhesive in at least a direction bounded by the plurality of nanoparticles.

22. The assembly of claim 19, wherein the substrate, the chip component, the other component and the plurality of nanoparticles comprise a portion of an electrical device.

23. The assembly of claim 19, wherein the nanoparticles comprise a material immiscible with the flowable adhesive.

24. The assembly of claim 19, wherein the substrate is selected from a group consisting of a printed circuit board, a package substrate, a card, a motherboard, and a flex substrate.

25. The assembly of claim 19, wherein the chip component is selected from a group consisting of a flip chip component, an unpackaged chip component, a packaged chip component, a processing device, a memory device, an input/output device, a graphics device, and audio device, a chipset device, a controller device, an optoelectronic device, and a network communications device.

26. The assembly of claim 22, wherein the electrical device is selected from a group consisting of a computing device, a communication device, an entertainment device, an analytical/monitoring device, a vehicle operation/safety device, a network device, and an industrial/manufacturing device.

27. The assembly of claim 22, wherein the chip component is at least one of a flip chip component or a controlled collapse chip connect (C4) component.