Microchannel plate and method of manufacturing microchannel plate

• US 20070135013A1
• Filed: 04/24/2006
• Published: 06/14/2007
• Est. Priority Date: 09/12/2001
• Status: Active Grant

• Current Assignee: Sadeg Faris
• Original Assignee: Sadeg Faris
• Inventors: Faris, Sadeg
• Granted Patent: US 7,420,147 B2
• Time in Patent Office: Days
• US Class Current: 445/49
• CPC Class Codes: H01J 43/246 Microchannel plates [MCP] image amplification tubes using MCP H01J31/507
• CPC Class Codes: H01J 9/125 of secondary emission electrodes
• CPC Class Codes: H01J 9/18 Assembling together the component parts of electrode systems

Abstract

A method of fabricating a multichannel plate is provided. The method includes providing a N layers, each layer having an array of wells formed therein. The N layers are aligned and stacked. The stack of N layers are sliced along a first and second line of the array of wells. The first line of the array of wells provides a first surface corresponding to a first array of channel openings of the MCP, and the second line of said array of wells provides a second surface corresponding to a second array of channel openings of the MCP. This method provides several functional benefits compared to conventional methods. These include, but are not limited to: the ability to produce well known and well characterized channels; the ability to produce well known and well characterized periods between channels; the ability to produce channels having any desired secondary electron emission enabling material therein; the ability to fabricate the substrate and/or final MCP of silicon.

Claims

1. A method of fabricating a MCP comprising:

providing a first layer having an array of wells formed therein;

providing an Nth layer substantially identical to the first layer having an array of wells formed therein;

aligning and stacking the N layers;

slicing the stack of N layers along a first and second line of said array of wells wherein said first line of said array of wells provides a first surface corresponding to a first array of channel openings of the MCP, and wherein said second line of said array of wells provides a second surface corresponding to a second array of channel openings of the MCP.

2. The method as in claim 1, wherein said first surface, said second surface, or both said first surface and said second surface are subject to further processing to access said openings.

3. The method as in claim 1, wherein each said wells have a shape defining one channel of the MCP, wherein the shape has a first end region corresponding to a first opening of a MCP channel and a second end region corresponding to a second opening of a MCP channel.

4. The method as in claim 1, wherein each said wells have a shape defining two channels of the MCP, wherein the shape has a first end region corresponding to a first opening of a first MCP channel and a second end region corresponding to a first opening of a second MCP channel, and a central region corresponding to a second opening of a first MCP channel and a second opening of a second MCP channel.

5. The method as in claim 1, wherein each said wells are coated with a secondary electron emission coating.

6. The method as in claim 5, wherein said secondary electron emission coating is selected from the group of materials consisting of cesium iodide, magnesium fluoride, magnesium oxide, copper iodide, gold, and combinations and alloys comprising at least one of the foregoing materials.

7. The method as in claim 1, wherein providing said layers comprises providing a device layer comprising said wells therein or thereon releasably attached to a substrate, and removing said device layer from said substrate without damage to said wells.