Stack underflow debug with sticky base

• US 20070136565A1
• Filed: 12/09/2005
• Published: 06/14/2007
• Est. Priority Date: 12/09/2005
• Status: Active Grant

• Current Assignee: Atmel Corporation (Microchip Technology Incorporated)
• Original Assignee: Atmel Corporation (Microchip Technology Incorporated)
• Inventors: Lambrache, Emil, Froemming, Benjamin
• Granted Patent: US 7,752,427 B2
• Time in Patent Office: Days
• US Class Current: 712/244
• CPC Class Codes: G06F 11/3636 by tracing the execution of the program
• CPC Class Codes: G06F 9/322 for non-sequential address
• CPC Class Codes: G06F 9/323 for indirect branch instructions
• CPC Class Codes: G06F 9/3861 Recovery, e.g. branch miss-prediction, exception handling error detection or correction G06F11/00

Abstract

A stack pointer is copied to a stack pointer base to debug stack underflow. A move instruction, used to initialize the stack pointer, is modified to additionally copy the stack pointer to a stack pointer base register. During a course of execution in a single context, the stack pointer base sticks to the initial base value while the stack pointer is altered by a succession of PUSH and POP instructions. By monitoring for equivalence in the stack pointer and the stack pointer base values, a balanced number of PUSH and POP instructions is detected. If an equal number of PUSH and POP instructions is detected and an additional POP instruction is programmed, a stack underflow condition exists, an exception condition signaled, and exception flag produced. The exception condition allows the stack to be protected from an excessive POP instruction retrieving data out of context and subsequent loss of stack data.

Claims

1. An apparatus for stack pointer comparison comprising:

a first register means for storing a stack pointer value;

a second register means for storing a stack pointer base value;

a comparison means, coupled to the first register means and the second register means, for producing an equivalence signal on a positive comparison of equivalence between the stack pointer value and the stack pointer base value;

a storage means, coupled to the comparison means, for storing the equivalence signal;

an instruction storage means for storing an instruction and producing an instruction signal when a stack memory retrieval instruction is stored;

a logic combining means, coupled to the storage means and the instruction storage means, for combining the equivalence signal with the instruction signal and producing a stack exception signal upon receiving an assertive logic level in both the equivalence signal and the instruction signal; and

a condition-flag storage means, coupled to the logic combining means, for storing the stack exception signal and producing an exception signal upon receiving the stack exception signal.

2. A stack memory initialization instruction comprising:

a microprogram controller means for asserting a plurality of datapath control signals including a first datapath control signal and a second datapath control signal;

a first register means, coupled to the microprogram controller means, for storing a stack pointer value upon receipt of the first datapath control signal;

a second register means, coupled to the microprogram controller means, for storing a stack pointer base value upon receipt of the second datapath control signal;

a move operand means, contained within an operand field of the stack memory initialization instruction, for encoding a move operand; and

a move microprogram means, programmed within the microprogram controller means, for triggering assertion of the first datapath control signal and the second datapath control signal upon decoding the move operand means.

3. A method of detecting stack memory underflow in a computer memory comprising:

initializing a stack pointer with a stack memory initializing command;

copying the initial stack pointer to a stack pointer base with the stack memory initializing command;

comparing the stack pointer and the stack pointer base;

determining if an equivalence exists between the stack pointer and the stack pointer base;

monitoring for a stack memory access instruction if the step of determining if an equivalence exists is true;

determining if a current instruction is a PUSH instruction if the step of monitoring for a stack memory access instruction determines the current instruction accesses stack memory;

determining if a current instruction is a POP instruction if the step of determining if a current instruction is a PUSH instruction is false; and

producing a stack memory exception condition if the step of determining if a current instruction is a POP instruction is true.