Gate layouts for transistors
First Claim
1. A transistor comprising:
- a semiconductor material having a top surface, the semiconductor material comprising a plurality of drain regions and a plurality of source regions, wherein the plurality of drain regions and the plurality of source regions are formed in alternating rows or columns; and
a plurality of polysilicon chains overlaying and insulated from the top surface of the semiconductor material, the plurality of polysilicon chains separating the plurality of drain regions from the plurality of source regions, wherein the plurality of polysilicon chains are disconnected from and substantially parallel to one another.
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Abstract
A transistor and a method of fabricating the transistor are provided. The transistor includes a semiconductor material comprising drain regions and source regions formed in alternating rows or columns. The transistor also includes polysilicon chains overlaying the top of the semiconductor material, disconnected from and substantially parallel to one another, and separating the drain regions from the source regions. The method includes providing a semiconductor material, growing a first insulating layer on top of the semiconductor material, depositing a polysilicon layer on top of the first insulating layer, defining a plurality of chains in the polysilicon layer, the plurality of chains being disconnected from and substantially parallel to one another, and forming a plurality of drain regions and a plurality of source regions in the semiconductor material in alternating rows or columns. The plurality of chains separates the plurality of drain regions from the plurality of source regions.
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Citations
22 Claims
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1. A transistor comprising:
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a semiconductor material having a top surface, the semiconductor material comprising a plurality of drain regions and a plurality of source regions, wherein the plurality of drain regions and the plurality of source regions are formed in alternating rows or columns; and
a plurality of polysilicon chains overlaying and insulated from the top surface of the semiconductor material, the plurality of polysilicon chains separating the plurality of drain regions from the plurality of source regions, wherein the plurality of polysilicon chains are disconnected from and substantially parallel to one another. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method of fabricating a transistor, the method comprising:
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providing a semiconductor material having a top surface;
growing a first insulating layer on the top surface of the semiconductor material;
depositing a polysilicon layer on top of the first insulating layer, the first insulating layer insulating the polysilicon layer from the semiconductor material;
defining a plurality of chains in the polysilicon layer, the plurality of chains being disconnected from and substantially parallel to one another; and
forming a plurality of drain regions and a plurality of source regions in the semiconductor material, the plurality of drain regions and the plurality of source regions being formed in alternating rows or columns, wherein the plurality of chains separates the plurality of drain regions from the plurality of source regions. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22)
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Specification