Backlit Photodiode and Method of Manufacturing a Backlit Photodiode

• US 20070138588A1
• Filed: 12/13/2006
• Published: 06/21/2007
• Est. Priority Date: 12/16/2005
• Status: Active Grant

• Current Assignee: IceMOS Technology Ltd
• Original Assignee: IceMos Technology Corp.
• Inventors: Wilson, Robin, Brogan, Conor, MacNamara, Cormac, Griffin, Hugh
• Granted Patent: US 7,576,404 B2
• Time in Patent Office: Days
• US Class Current: 257/458
• CPC Class Codes: H01L 31/022408 for devices characterised by at least one potential jump barrier or surface barrier

Abstract

A backlit photodiode array includes a semiconductor substrate having first and second main surfaces opposite to each other. A first dielectric layer is formed on the first main surface. First and second conductive vias are formed extending from the second main surface through the semiconductor substrate and the first dielectric layer. The first and second conductive vias are isolated from the semiconductor substrate by a second dielectric material. A first anode/cathode layer of a first conductivity is formed on the first dielectric layer and is electrically coupled to the first conductive via. An intrinsic semiconductor layer is formed on the first anode/cathode layer. A second anode/cathode layer of a second conductivity opposite to the first conductivity is formed on the intrinsic semiconductor layer and is electrically coupled to the second conductive via.

Claims

1. A photodiode comprising:

a semiconductor substrate having first and second main surfaces opposite to each other;

a first dielectric layer formed on the first main surface;

a first conductive via extending from the second main surface, through the semiconductor substrate and through the first dielectric layer, the first conductive via being isolated from the semiconductor substrate by a second dielectric material;

a second conductive via extending from the second main surface, through the semiconductor substrate and through the first dielectric layer, the second conductive via being isolated from the semiconductor substrate by the second dielectric material;

a first anode/cathode layer formed on the first dielectric layer, the first anode/cathode layer being electrically coupled to the first conductive via, the first anode/cathode layer being of a first conductivity;

an intrinsic semiconductor layer formed on the first anode/cathode layer; and

a second anode/cathode layer formed on the intrinsic semiconductor layer, the second anode/cathode layer being electrically coupled to the second conductive via, the second anode/cathode layer being of a second conductivity opposite to the first conductivity.

2. The photodiode according to claim 1, wherein the first dielectric layer is an oxide.

3. The photodiode according to claim 1, wherein the first conductivity is one of p-type and n-type and the second conductivity is the other one of p-type and n-type.

4. A photodiode array comprising:

a silicon-on-insulator (SOI) substrate having first and second main surfaces opposite to each other, the SOI substrate having a dielectric layer proximate the first main surface;

a photodiode layer formed on the dielectric layer on the first main surface of the SOI substrate, the photodiode layer having a first anode/cathode layer proximate the dielectric layer and a second anode/cathode layer proximate an exposed surface of the photodiode layer;

at least one anode/cathode via formed in the photodiode layer proximate the second anode/cathode layer, the at least one anode/cathode via extending to the dielectric layer;

first and second conductive vias extending from the second main surface of the SOI substrate, through the SOI substrate and the dielectric layer, the first conductive via being electrically coupled to the first anode/cathode layer and the second conductive via being electrically coupled to the second anode/cathode layer.

6. The method according to claim 4, further comprising:

at least one of planarizing, grinding and polishing the second main surface of the SOI substrate.

5. A method of manufacturing a photodiode array comprising:

providing a silicon-on-insulator (SOI) substrate having first and second main surfaces opposite to each other, the SOI substrate having a dielectric layer proximate the first main surface;

forming a photodiode layer on the dielectric layer on the first main surface of the SOI substrate, the photodiode layer having a first anode/cathode layer proximate the dielectric layer and a second anode/cathode layer proximate an exposed surface of the photodiode;

forming at least one anode/cathode trench in the exposed surface of the photodiode layer, the at least one anode/cathode trench extending to the dielectric layer;

doping sidewalls of the at least one anode/cathode trench;

forming first and second via trenches extending from the second main surface of the SOI substrate and through the SOI substrate and the dielectric layer;

forming a first conductive layer in the first via trench, the first conductive layer being electrically coupled to the first anode/cathode layer; and

forming a second conductive layer in the second via trench, the second conductive layer being electrically coupled to the second anode/cathode layer.

7. The method according to claim 5, wherein the at least one anode/cathode trench and the first and second via trenches are formed utilizing one of plasma etching, Reactive Ion Etching (RIE) and chemical etching.

8. The method according to claim 5, wherein the doping is performed by one of ion implantation, solid diffusion, liquid diffusion, spin-on deposits, plasma doping, vapor phase doping and laser doping

9. A photodiode array formed by the method of claim 5.