Detector of noise peaks in the power supply of an integrated circuit

• US 20070139988A1
• Filed: 12/19/2006
• Published: 06/21/2007
• Est. Priority Date: 12/20/2005
• Status: Active Grant

• Current Assignee: Stmicroelectronics France (STMicroelectronics NV)
• Original Assignee: STMicroelectronics SA (STMicroelectronics NV)
• Inventors: Duval, Benjamin, Malherbe, Alexandre
• Granted Patent: US 7,839,182 B2
• Time in Patent Office: Days
• US Class Current: 365/43
• CPC Class Codes: G06K 19/073 Special arrangements for circuits, e.g. for protecting identification code in memory protection against unauthorised use of computer memory G06F12/14
• CPC Class Codes: G06K 19/07363 by preventing analysis of the circuit, e.g. dynamic or static power analysis or current analysis

Abstract

A circuit for detecting noise peaks on the power supply of an electronic circuit, including at least a first transistor having its control terminal connected to a terminal of application of a first potential of a supply voltage of the circuit and having a first conduction terminal connected to a terminal of application of a second potential via at least one first resistive element, the second conduction terminal of the first transistor providing the result of the detection.

Claims

1. A circuit for detecting noise peaks on the power supply of an electronic circuit, comprising at least a first transistor having its control terminal connected to a terminal of application of a first potential of a supply voltage of the circuit and having a first conduction termina connected to a terminal of application of a second potential via at least one first resistive element, the second conduction terminal of the first transistor providing the result of the detection.

2. The circuit of claim 1, wherein a first capacitive element connects said first conduction terminal to a terminal of application of a reference potential of the power supply voltage, the respective values of the first resistive element and of the first capacitive element being selected according to the minimum duration of the noise peaks to be detected.

3. The circuit of claim 1, wherein a second resistive element forms, with said first resistive element, a voltage-dividing bridge having an intermediary terminal connected to said first conduction terminal of the first transistor.

4. The circuit of claim 3, wherein a third resistive element connects said intermediary terminal to the first conduction terminal of the first transistor.

5. The circuit of claim 1, wherein said control terminal of the first transistor is directly connected to said terminal of application of the first potential of the power supply voltage.

6. The circuit of claim 1, wherein a first secondary resistive element connects said terminal of application of the first potential of the supply voltage to the control terminal of the first transistor.

7. The circuit of claim 6, wherein a second secondary resistive element connects said control terminal of the first transistor to the reference potential of the supply voltage.

8. The circuit of claim 1, comprising a second transistor of a type opposite to the first one to form a bidirectional noise peak detector, the respective control terminals of the two transistors being connected together to said terminal of application of the first potential of the supply voltage.

9. The circuit of claim 8, wherein the second transistor is connected in parallel on the first one.

10. The circuit of claim 8, wherein the second transistor has its first conduction terminal connected to a first electrode of a second capacitive element having its other electrode connected to said terminal of application of the reference potential, each transistor being associated with a first resistive element of different value.

11. The circuit of claim 1, wherein said first transistor is a MOS transistor.

12. The circuit of claim 1, wherein said first transistor is a bipolar transistor.

13. The circuit of claim 1, wherein the first and second potentials are identical.

14. The circuit of claim 1, wherein the resistive and/or capacitive elements are selected according to the amplitude and to the minimum duration of the peaks to be detected.

15. An electronic circuit comprising a detector of noise peaks on its power supply, wherein the detector is that of claim 1.