Method of manufacturing non-volatile memory element

• US 20070141786A1
• Filed: 12/12/2006
• Published: 06/21/2007
• Est. Priority Date: 12/15/2005
• Status: Abandoned Application

• Current Assignee: Elpida Memory Incorporated (Micron Technology, Inc.)
• Original Assignee: Elpida Memory Incorporated (Micron Technology, Inc.)
• Inventors: Asano, Isamu, Kawagoe, Tsuyoshi
• Application Number:
  US11/637,069
• Publication Number:
  US 20070141786A1
• Time in Patent Office: Days
• US Class Current: 438/266
• CPC Class Codes: H10B 63/30 comprising selection components having three or more electrodes, e.g. transistors
• CPC Class Codes: H10B 63/82 the switching components having a common active material layer
• CPC Class Codes: H10N 70/026 by physical vapor deposition, e.g. sputtering
• CPC Class Codes: H10N 70/046 by diffusion, e.g. photo-dissolution
• CPC Class Codes: H10N 70/231 based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
• CPC Class Codes: H10N 70/826 adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
• CPC Class Codes: H10N 70/8413 adapted for resistive heating
• CPC Class Codes: H10N 70/8825 Selenides, e.g. GeSe
• CPC Class Codes: H10N 70/8828 Tellurides, e.g. GeSbTe
• CPC Class Codes: H10N 70/884 based on at least one element of group IIIA, IVA or VA, e.g. elemental or compound semiconductors compounds of sulfur, selenium or tellurium, e.g. chalcogenides H10N70/882; oxides or nitrides H10N70/883

Abstract

A method of manufacturing a non-volatile memory element in the present invention comprises a first step for forming an adhesion layer on an interlayer insulating film so that an electrical connection is established with a lower electrode, a second step for forming a recording layer containing a phase change material on the adhesion layer, a third step for forming an upper electrode that is electrically connected to the recording layer, and a fourth step for diffusing in the recording layer some of the adhesion layer positioned between at least the lower electrode and the recording layer.

Claims

1. A method of manufacturing a non-volatile memory element, comprising:

a first step for forming an adhesion layer on an interlayer insulating film so that an electrical connection is established with a lower electrode;

a second step for forming a recording layer containing a phase change material on the adhesion layer;

a third step for forming an upper electrode that is electrically connected to the recording layer; and

a fourth step for diffusing in the recording layer some of the adhesion layer positioned between at least the lower electrode and the recording layer.

2. The method of manufacturing a non-volatile memory element as claimed in claim 1, wherein the second step includes a step wherein the phase change material is formed into a film in an inert gas atmosphere with which an additive has been mixed.

3. The method of manufacturing a non-volatile memory element as claimed in claim 2, wherein the additive contains nitrogen.

4. The method of manufacturing a non-volatile memory element as claimed in claim 3, wherein the amount of nitrogen added is 1 to 10% in terms of the ratio of flow relative to that of the inert gas.

5. The method of manufacturing a non-volatile memory element as claimed in claim 1, wherein the interlayer insulating film includes silicon oxide.

6. The method of manufacturing a non-volatile memory element as claimed in claim 1, wherein the adhesion layer contains titanium (Ti).

7. The method of manufacturing a non-volatile memory element as claimed in claim 1, wherein the film thickness of the adhesion layer is 1 to 4 nm.

8. The method of manufacturing a non-volatile memory element as claimed in claim 1, wherein the phase change material contains a chalcogenide material.

9. The method of manufacturing a non-volatile memory element as claimed in claim 8, wherein the chalcogenide material is Ge₂Sb₂Te₅ (GST).

10. The method of manufacturing a non-volatile memory element as claimed in claim 1, wherein the fourth step includes a step for performing a heat treatment at a prescribed temperature.

11. The method of manufacturing a non-volatile memory element as claimed in claim 10, wherein the prescribed temperature is preferably 350°

C. or more.

12. The method of manufacturing a non-volatile memory element as claimed in claim 1, the fourth step is an initialization step for repeating the rewriting of the recording layer.

13. The method of manufacturing a non-volatile memory element as claimed in claim 12, the number of repeated rewritings is 10⁵ or more.

14. A method of manufacturing a non-volatile memory element, comprising:

a first step for forming an adhesion layer on an interlayer insulating film so that an electrical connection is established with a lower electrode;

a second step for removing a part of the adhesion layer on a lower electrode;

a third step for forming a recording layer containing a phase change material on the adhesion layer including an exposure surface of the lower electrode; and

a forth step for forming an upper electrode that is electrically connected to the recording layer.