Method for manufacturing semiconductor device
First Claim
Patent Images
1. A method for manufacturing a semiconductor device, the method comprising:
- forming an insulation layer on a bottom structure of a semiconductor substrate;
forming a trench and a via hole by selectively etching the insulation layer;
forming a copper layer on an entire surface of the semiconductor substrate until filling the via hole and the trench;
planarizing the copper layer by chemical mechanical polishing to form a copper line filling the via hole and the trench;
performing a plasma process to form a plasma-treated surface layer on the semiconductor substrate; and
removing the plasma-treated surface layer.
1 Assignment
0 Petitions
Accused Products
Abstract
Provided is a method for manufacturing a semiconductor device. An insulation layer is formed on a bottom structure of a semiconductor substrate. Then, a trench and a via hole are formed by selectively etching the insulation layer, and a copper layer is deposited to fill the via hole and the trench. Next, a copper line is formed by a CMP (chemical mechanical polishing) process to planarize the copper layer, and a plasma process is performed to form a plasma-treated surface layer of the semiconductor substrate. The plasma-treated surface layer is then removed.
-
Citations
20 Claims
-
1. A method for manufacturing a semiconductor device, the method comprising:
-
forming an insulation layer on a bottom structure of a semiconductor substrate; forming a trench and a via hole by selectively etching the insulation layer; forming a copper layer on an entire surface of the semiconductor substrate until filling the via hole and the trench; planarizing the copper layer by chemical mechanical polishing to form a copper line filling the via hole and the trench; performing a plasma process to form a plasma-treated surface layer on the semiconductor substrate; and removing the plasma-treated surface layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
-
-
11. A method for a semiconductor device, the method comprising:
-
forming an insulation layer on a bottom structure of a semiconductor substrate; forming a trench and a via hole by selectively etching the insulation layer; forming a copper layer on an entire surface of the semiconductor substrate until filling the via hole and the trench; planarizing the copper layer by a chemical mechanical polishing process to form a copper line filling the via hole and the trench; amorphizing a surface layer of the semiconductor substrate having the copper line thereon; performing a plasma process to form a plasma-treated, amorphous surface layer; and removing the plasma-treated, amorphous surface layer. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20)
-
Specification