Method and apparatus for using long forward error correcting codes in a content distribution system

• US 20070143654A1
• Filed: 12/15/2005
• Published: 06/21/2007
• Est. Priority Date: 12/15/2005
• Status: Active Grant

• Current Assignee: Google Technology Holdings LLC (Alphabet Inc.)
• Original Assignee: General Instrument Corporation (CommScope Holding Company, Inc.)
• Inventors: Schmidt, Mark, Joyce, Gerald, Moran, John
• Granted Patent: US 7,831,887 B2
• Time in Patent Office: Days
• US Class Current: 714/752
• CPC Class Codes: H03M 13/1111 Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
• CPC Class Codes: H03M 13/1185 wherein the parity-check matrix comprises a part with a double-diagonal
• CPC Class Codes: H03M 13/255 with Low Density Parity Check [LDPC] codes

Abstract

Method and apparatus for using long FEC codes in a content distribution system is described. One aspect of the invention relates to encoding frames of content. Each frame is partitioned into un-coded bits and bits to be encoded. For each frame, an FEC code is applied to the bits to be encoded to generate a codeword. Groups of bits from the codeword are divided among a plurality of channels. Symbols formed from the groups of bits and the un-coded bits are mapped to a constellation for each of the plurality of channels. The symbols are modulated across a respective plurality of bonded channels for transmission.

Claims

1. A method of encoding frames of content, comprising:

partitioning each frame into un-coded bits and bits to be encoded; and

for each frame;

applying a forward error correction (FEC) code to the bits to be encoded to generate a codeword;

dividing groups of bits from the codeword among a plurality of channels; and

mapping symbols formed from the groups of bits and the un-coded bits to a constellation for each of the plurality of channels.

2. The method of claim 1, further comprising, for each frame:

interleaving bits in the codeword to generate an interleaved bit stream; and

obtaining the groups of bits from the interleaved bit stream.

3. The method of claim 1, wherein the FEC code comprises a low density parity check (LDPC) code.

4. The method of claim 3, wherein the LDPC code has a length N greater than or equal to 32,400 bits.

5. The method of claim 1, wherein the constellation comprises a quadrature amplitude modulation (QAM) constellation.

6. The method of claim 1, wherein the codeword includes information bits and parity bits, and wherein the information bits comprise two bits for each of the symbols, and wherein the un-coded bits comprise log₂(M)−

2 bits for each of the symbols, where M is a number of the points in the QAM constellation.

7. The method of claim 1, further comprising:

modulating the symbols for each of the plurality of channels across a respective plurality of bonded channels.

8. The method of claim 1, wherein the groups of bits are divided among the plurality of channels in a round-robin fashion.

9. The method of claim 1, wherein each of the groups of bits comprises two bits.

10. Apparatus for encoding frames of content, comprising:

a data parser for partitioning each frame into un-coded bits and bits to be encoded;

an encoder for applying a forward error correction (FEC) code to the bits to be encoded to generate a codeword for each frame;

a bit interleaver/grouper for dividing groups of bits from the codeword among a plurality of channels for each frame; and

a mapper for mapping symbols formed from the groups of bits and the un-coded bits to points in a constellation for each of the plurality of channels for each frame.

11. The apparatus of claim 10, wherein the bit interleaver/grouper is configured to interleave bits in the codeword to generate an interleaved bit stream and obtain the groups of bits from the interleaved bit stream for each frame.

12. The apparatus of claim 10, wherein the FEC code comprises a low density parity check (LDPC) code.

13. The apparatus of claim 12, wherein the LDPC code has a length N greater than or equal to 32,400 bits.

14. The apparatus of claim 10, wherein the constellation comprises a quadrature amplitude modulation (QAM) constellation.

15. The apparatus of claim 10, wherein the codeword includes information bits and parity bits, and wherein the information bits comprise two bits for each of the symbols, and wherein the un-coded bits comprise log₂(M)−

2 bits for each of the symbols, where M is a number of the points in the QAM constellation.

16. The apparatus of claim 10, further comprising:

a modulator for modulating the symbols for each of the plurality of channels across a respective plurality of bonded channels.

17. The apparatus of claim 10, wherein the bit interleaver/grouper is configured to divide the groups of bits among the plurality of channels in a round-robin fashion.

18. Apparatus for decoding frames of content, comprising:

a demodulator for generating in-phase and quadrature (I, Q) pairs for each of a plurality of channels from a quadrature amplitude modulation (QAM) constellation for symbols of each frame;

a log likelihood ratio (LLR) calculator for computing LLRs for the I, Q pairs for each of the plurality of channels for each frame;

an LLR bit de-interleaver for de-interleaving the LLRs for the plurality of channels for each frame;

a low density parity check (LDPC) decoder for producing decoded bits from the LLRs for each frame;

a bit interleaver/grouper for generating groups of interleaved bits in each of the plurality of channels from bits in the decoded bits for each frame;

a QAM re-mapper for selecting most significant bits (MSBs) from the I, Q pairs in each frame as un-coded bits using the groups of interleaved bits;

a parity bit deletion module for deleting parity bits from the decoded bits to generate information bits for each frame; and

a data re-combiner for combining the un-coded bits and the information bits for each frame.

19. The apparatus of claim 18, wherein the LDPC decoder is configured to produce the decoded bits using quantized message passage decoding.

20. The apparatus of claim 18, wherein each of the groups of interleaved bits comprises two bits, and wherein the MSBs from each of the I, Q pairs comprise log₂(M)−

2 bits, where M is a number of the points in the QAM constellation.