Semiconductor device

• US 20070145420A1
• Filed: 12/15/2006
• Published: 06/28/2007
• Est. Priority Date: 12/15/2005
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Sanyo Electric Company Limited (Panasonic Holdings Corporation)
• Inventors: Okada, Kazuo, Yamada, Hiroshi, Noma, Takashi, Morita, Yuichi, Kitagawa, Katsuhiko, Okubo, Noboru, Shinogi, Hiroyuki, Ishibe, Shinzo, Okigawa, Mitsuru, Otsuka, Shigeki
• Granted Patent: US 7,986,021 B2
• Time in Patent Office: Days
• US Class Current: 257/228
• CPC Class Codes: H01L 2224/02371 connecting the bonding area on a surface of the semiconductor or solid-state body with another surface of the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/02372 connecting to a via connection in the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/05 of an individual bonding area
• CPC Class Codes: H01L 2224/05548 Bonding area integrally formed with a redistribution layer on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/13022 the bump connector being at least partially embedded in the surface
• CPC Class Codes: H01L 2224/13024 the bump connector being disposed on a redistribution layer on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/131 with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• CPC Class Codes: H01L 23/481 Internal lead connections, e.g. via connections, feedthrough structures
• CPC Class Codes: H01L 27/14618 Containers
• CPC Class Codes: H01L 27/14625 Optical elements or arrangements associated with the device
• CPC Class Codes: H01L 2924/014 Solder alloys
• CPC Class Codes: H01L 31/0203 Containers; Encapsulations , e.g. encapsulation of photodiodesfor photovoltaic devices H01L31/048; for organic photosensitive devices H10K30/80
• CPC Class Codes: H01L 31/02327 the optical elements being integrated or being directly associated to the device, e.g. back reflectors optical coatings H01L31/0216

Abstract

The invention provides a semiconductor device that solves a problem of reflection of a pattern of a wiring formed on a back surface of a semiconductor substrate on an output image. A reflection layer is formed between a light receiving element and a wiring layer, that reflects an infrared ray toward a light receiving element the without transmitting it to the wiring layer, the infrared ray entering from a light transparent substrate toward the wiring layer through a semiconductor substrate. The reflection layer is formed at least in a region under the light receiving element uniformly or only under the light receiving element. Alternatively, an anti-reflection layer having a function of absorbing the entering infrared ray to prevent transmission thereof may be formed instead of the reflection layer.

Claims

1. A semiconductor device comprising:

a semiconductor substrate comprising a front surface and a back surface;

a light receiving element formed on the front surface of the semiconductor substrate;

a transparent substrate attached to the front surface of the semiconductor substrate so as to cover the light receiving element;

a wiring layer formed on the back surface of the semiconductor substrate; and

a reflection layer formed on the back surface of the semiconductor substrate and located between the light receiving element and the wiring layer, the reflecting layer being configured to reflect an infrared ray passing through the transparent substrate, the light receiving element and the semiconductor substrate back toward to the light receiving element.

2. The semiconductor device of claim 1, wherein the reflection layer is confined to an area of the back surface of the semiconductor substrate that is a projection of the light receiving element onto the back surface.

3. The semiconductor device of claim 1, wherein the wiring layer extends to be on a side surface of the semiconductor substrate, and the reflection layer extends to be between the extending wiring layer and the side surface of the semiconductor substrate.

4. The semiconductor device of claim 1, wherein the reflection layer comprises a metal.

5. A semiconductor device comprising:

a semiconductor substrate comprising a front surface and a back surface;

a light receiving element formed on the front surface of the semiconductor substrate;

a transparent substrate attached to the front surface of the semiconductor substrate so as to cover the light receiving element;

a wiring layer formed on the back surface of the semiconductor substrate; and

an anti-reflection layer formed on the back surface of the semiconductor substrate and located between the light receiving element and the wiring layer, the anti-reflection layer being configured to absorb an infrared ray.

6. The semiconductor device of claim 5, wherein the anti-reflection layer is confined to an area of the back surface of the semiconductor substrate that is a projection of the light receiving element onto the back surface.

7. The semiconductor device of claim 5, wherein the wiring layer extends to be on a side surface of the semiconductor substrate, and the anti-reflection layer extends to be between the extending wiring layer and the side surface of the semiconductor substrate.

8. The semiconductor device of claim 5, wherein the anti-reflection layer comprises an infrared ray absorbent material mixed therein.