Power dissipation-optimized high-frequency coupling capacitor and rectifier circuit

• US 20070145528A1
• Filed: 02/20/2007
• Published: 06/28/2007
• Est. Priority Date: 08/19/2004
• Status: Abandoned Application

• Current Assignee: Atmel Germany GmbH (Microchip Technology Incorporated)
• Original Assignee: Atmel Germany GmbH (Microchip Technology Incorporated)
• Inventors: Fischer, Martin
• Application Number:
  US11/707,996
• Publication Number:
  US 20070145528A1
• Time in Patent Office: Days
• US Class Current: 257/532
• CPC Class Codes: G06K 19/0701 at least one of the integrated circuit chips comprising an arrangement for power management
• CPC Class Codes: G06K 19/0723 the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
• CPC Class Codes: G06K 19/07749 the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
• CPC Class Codes: H01L 27/0794 Combinations of capacitors and resistors
• CPC Class Codes: H01L 27/0805 Capacitors only

Abstract

A power dissipation-optimized high-frequency coupling capacitor is provided for a rectifier circuit as well as a power dissipation-optimized high-frequency rectifier circuit. The elements of the rectifier stages of the inventive high-frequency rectifier circuit are disposed in an optimized manner regarding space such that the coupling capacitors are connected directly to the contact area for the antenna terminal and are arranged around the contact area while taking into account the connecting wires.

Claims

1. An integrated lateral high-frequency coupling capacitor for a rectifier circuit having a substrate and at least one capacitance finger in the form of a strip arranged on a front side of the substrate, the coupling capacitor comprising:

at least one electrically conductive cathode layer that is contacted at a front side through at least one cathode contact strip and has a parasitic series resistance resulting from a ratio of a sheet resistance length to a sheet resistance width within the cathode layer; and

at least one electrically conductive anode layer that is insulated from the cathode layer by a dielectric and that is electrically contacted on the front side by at least one anode contact strip,

wherein the sheet resistance length identifies a lateral spacing projected in a layout plane between the cathode contact strip and the anode contact strip,

wherein the sheet resistance width identifies a lateral length projected in the layout plane within which the anode layer and the cathode layer are contacted by the anode contact strip or the cathode contact strip, respectively, with a lateral separation that corresponds to the sheet resistance length, and

wherein the sheet resistance length is smaller than the sheet resistance width.

2. The coupling capacitor according to claim 1, wherein the ratio of sheet resistance length to sheet resistance width is in a range of ½

to 1/1000 or in a range of 1/10 to 1/100.

3. The coupling capacitor according to claim 1, wherein the anode contact strips and the cathode contact strips are arranged parallel to one another, at least in sections.

4. The coupling capacitor according to claim 1, wherein the anode contact strip contacts the anode layer and/or the cathode contact strip contacts the cathode layer by a plurality of contact holes that are arranged close together.

5. The coupling capacitor according to claim 1, wherein the cathode layer is contacted on both sides, with respect to the anode layer, by cathode contact strips.

6. The coupling capacitor according to claim 1, wherein the anode contact strips are arranged centrally within the anode layer so that the anode contact strips have a substantially equal lateral separation from edges of the anode layer, in particular a minimal lateral separation.

7. The coupling capacitor according to claim 6 wherein the cathode contact strips have a minimal lateral separation from the edges of the anode layer.

8. The coupling capacitor according to claim 1, wherein a plurality of capacitance fingers are provided that are arranged substantially parallel to one another with a minimal lateral spacing from one another.

9. The coupling capacitor according to claim 1, wherein the substrate is a highly doped semiconductor substrate that is electrically contacted through substrate contact strips.

10. The coupling capacitor according to claim 9, wherein the substrate contact strips have a minimal lateral separation from the edges of the cathode layer.

11. The coupling capacitor according to claim 1, wherein the anode contact strips and/or the cathode contact strips contain metal and/or a metallic alloy.

12. The coupling capacitor according to claim 1, wherein the anode layer and/or the cathode layer have highly doped polysilicon.

13. The coupling capacitor according to claim 25, wherein the additional parasitic series resistance in the anode layer is smaller than the series resistance in the cathode layer by at least a factor of 10.

24. The rectifier circuit according to claim 14, wherein at least one of the coupling capacitances is an integrated coupling capacitor according to claim 1.

25. The coupling capacitor according to claim 1, wherein the anode layer includes an additional parasitic series resistance that results from a vertical distance of the anode contact strip to the dielectric, and wherein the parasitic series resistance in the anode layer is substantially smaller than the series resistance in the cathode layer.

26. A transponder comprising a rectifier circuit according to claim 1.

14. A multi-stage power dissipation-optimized high-frequency rectifier circuit for use in a transponder, comprising:

an input for coupling in a high-frequency AC signal having at least one contact area for an antenna connection;

an output for receiving a rectified output signal; and

multiple rectifier stages arranged in parallel to one another between the input and the output, each of the rectifier stages comprising;

a series circuit of a coupling capacitance for high-frequency applications;

a rectifier diode arranged in a forward direction; and

a load capacitance for low-frequency applications,

wherein the coupling capacitances are arranged parallel to one another in a projection of the layout plane and are each connected directly to a contact area for the antenna connection and are arranged around the contact area.

15. The rectifier circuit according to claim 14, wherein adjacent coupling capacitances have an equal lateral separation from one another in the projection of the layout plane, and in particular a minimal lateral separation.

16. The rectifier circuit according to claim 14, wherein the rectifier diodes are connected directly to the coupling capacitances associated with the rectifier diodes.

17. The rectifier circuit according to claim 14, wherein at least one additional diode is arranged between at least two adjacent rectifier stages, connecting the anode of the rectifier diodes of one rectifier stage to the cathode of the rectifier diodes of the respective adjacent rectifier stage.

18. The rectifier circuit according to claim 17, wherein the additional diodes are connected directly to the respective rectifier diodes of the respective adjacent rectifier stages to which they are connected.

19. The rectifier circuit according to claim 14, wherein the rectifier diodes and/or the additional diodes are Schottky diodes.

20. The rectifier circuit according to claim 14, wherein a load capacitance of a relevant rectifier stage is connected directly to a connection of the rectifier diode associated with this load capacitance.

21. The rectifier circuit according to claim 14, further comprising a reference potential ring having a reference potential, the reference potential ring being arranged directly around the entire arrangement of the rectifier stages and connects all reference potential nodes of the rectifier stages to the reference potential.

22. The rectifier circuit according to claim 14, further comprising at least one guard that is arranged directly around the entire arrangement of the rectifier stages.

23. The rectifier circuit according to claim 14, wherein the elements of the rectifier stages and the contact area for the antenna connection are designed in integrated form and are embedded in a well in a semiconductor substrate.