SUBSTRATE WITH MULTI-LAYER INTERCONNECTION STRUCTURE AND METHOD OF MANUFACTURING THE SAME

• US 20070145587A1
• Filed: 03/31/2006
• Published: 06/28/2007
• Est. Priority Date: 12/22/2005
• Status: Abandoned Application

• Current Assignee: Princo Corporation
• Original Assignee: Princo Corporation
• Inventors: Yang, Chih-Kuang
• Application Number:
  US11/308,519
• Publication Number:
  US 20070145587A1
• Time in Patent Office: Days
• US Class Current: 257/758
• CPC Class Codes: H01L 21/4857 Multilayer substrates multilayer metallisation on monolayer substrate H01L21/4846
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2224/81001 involving a temporary auxiliary member not forming part of the bonding apparatus
• CPC Class Codes: H01L 2224/81801 Soldering or alloying
• CPC Class Codes: H01L 24/16 of an individual bump connector
• CPC Class Codes: H01L 24/81 using a bump connector
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01024 Chromium [Cr]
• CPC Class Codes: H01L 2924/01029 Copper [Cu]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/01078 Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/01082 Lead [Pb]
• CPC Class Codes: H01L 2924/014 Solder alloys
• CPC Class Codes: H01L 2924/09701 Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/14 Integrated circuits
• CPC Class Codes: H01L 2924/3025 Electromagnetic shielding
• CPC Class Codes: H05K 2201/09109 Locally detached layers, e.g. in multilayer
• CPC Class Codes: H05K 2203/178 : Demolishing, e.g. recycling, reverse engineering, destroying for security purposes; Using biodegradable materials
• CPC Class Codes: H05K 3/0058 : Laminating printed circuit boards onto other substrates, e.g. metallic substrates H05K1/0281 takes precedence
• CPC Class Codes: H05K 3/0067 : onto an inorganic, non-metallic substrate
• CPC Class Codes: Y02P 70/50 : Manufacturing or production processes characterised by the final manufactured product

Abstract

The invention provides a substrate with multi-layer interconnection structure, which includes a substrate and a multi-layer interconnection structure formed on the substrate. The multi-layer interconnection structure is adhered to the substrate in partial areas. The invention also provides a method of manufacturing and recycling such substrate and a method of packaging electronic devices by using such substrate. The invention also provides a method of manufacturing multi-layer interconnection devices.

Claims

1. A substrate with multi-layer interconnection structure, comprising:

a substrate; and

a multi-layer interconnection structure formed on the substrate, wherein the multi-layer interconnection structure is adhered to the substrate in partial areas.

2. The substrate with multi-layer interconnection structure as described in claim 1, wherein the partial areas refer to a periphery region of the substrate.

3. The substrate with multi-layer interconnection structure as described in claim 1, wherein the partial areas are in a form of spots.

4. The substrate with multi-layer interconnection structure as described in claim 1, wherein the partial areas are in a form of grids.

9. A method of packaging electronic devices, comprising:

providing a substrate with multi-layer interconnection structure of claim 1;

electrically connecting at least one electronic device to the substrate with multi-layer interconnection structure;

applying a sealing compound on the electronic device; and

cutting the multi-layer interconnection structure, so that a multi-layer interconnection device having packaged electronic device separates from the substrate after being cut.

10. The method of packaging electronic devices as described in claim 9, wherein when there are a plurality of electronic devices, the step of applying a sealing compound on the plurality of electronic devices is to apply a sealing compound on specific areas of the substrate with multi-layer interconnection structure where the electronic devices are located, so that a remaining area has no sealing compound thereon, thereby maintaining the flexibility of the multi-layer interconnection device having packaged electronic devices.

11. A method of packaging electronic devices, comprising:

providing a substrate with multi-layer interconnection structure of claim 1;

cutting the multi-layer interconnection structure, so that a multi-layer interconnection device separates from the substrate after being cut;

electrically connecting at least one electronic device to the multi-layer interconnection device; and

applying a sealing compound on the electronic device.

12. The method of packaging electronic devices as described in claim 11, wherein when there are a plurality of electronic devices, the step of applying a sealing compound on the plurality of electronic devices is to apply a sealing compound on specific areas of the multi-layer interconnection device where the electronic devices are located, so that a remaining area has no sealing compound thereon, thereby maintaining the flexibility of the multi-layer interconnection device having packaged electronic devices.

13. A method of recycling substrates, comprising:

providing a substrate with multi-layer interconnection structure of claim 1;

and

removing the multi-layer interconnection structure from the substrate.

14. The method of recycling substrates as described in claim 13, wherein in the removing step, the multi-layer interconnection structure is removed from the substrate by utilizing a mixed solution of sulfuric acid and hydrogen peroxide.

15. The method of recycling substrates as described in claim 13, wherein in the removing step, the multi-layer interconnection structure is removed from the substrate by polishing.

16. The method of recycling substrate as described in claim 13, wherein in the removing step, the multi-layer interconnection structure is removed from the substrate by ripping.

17. The method of recycling substrate as described in claim 13, wherein a part of the multi-layer interconnection structure has been cut and removed.

5. A method of manufacturing a substrate with multi-layer interconnection structure, comprising:

providing a substrate; and

forming a multi-layer interconnection structure on the substrate, wherein the multi-layer interconnection substrate is adhered to the substrate in partial areas.

6. The method of manufacturing a substrate with multi-layer interconnection structure as described in claim 5, wherein the partial areas refer to a periphery region of the substrate.

7. The method of manufacturing a substrate with multi-layer interconnection structure as described in claim 5, wherein the partial areas are in a form of spots.

8. The method of manufacturing a substrate with multi-layer interconnection structure as described in claim 5, wherein the partial areas are in a form of grids.

18. A method of manufacturing multi-layer interconnection devices, comprising:

providing a substrate;

forming a multi-layer interconnection structure on the substrate, wherein the multi-layer interconnection substrate structure is adhered to the substrate in partial areas; and

cutting the multi-layer interconnection structure, so that a multi-layer interconnection device separates from the substrate after being cut.

19. The method of manufacturing multi-layer interconnection devices as described in claim 18, wherein the partial areas refer to a periphery region of the substrate.

20. The method of manufacturing multi-layer interconnection devices as described in claim 18, wherein the partial areas are in a form of spots.

21. The method of manufacturing multi-layer interconnection devices as described in claim 18, wherein the partial areas are in a form of grids.