Probe card with improved transient power delivery

• US 20070145989A1
• Filed: 12/27/2005
• Published: 06/28/2007
• Est. Priority Date: 12/27/2005
• Status: Abandoned Application

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Zhu, Hua, Swettlen, Timothy, Chuh, Erich
• Application Number:
  US11/318,660
• Publication Number:
  US 20070145989A1
• Time in Patent Office: Days
• US Class Current: 324/754.70
• CPC Class Codes: G01R 1/06772 High frequency probes
• CPC Class Codes: G01R 1/07342 the body of the probe being at an angle other than perpendicular to test object, e.g. probe card

Abstract

In high current integrated circuit wafer test applications, a high capacitance density capacitor may be formed in association with a probe card at a position closer to a wafer under test. This reduces the power path impedance, improving transient power delivery of a probe card. That is because now the capacitance is positioned more closely to the wafer under test, reducing path impedance. The capacitance density may be at higher, improving transient power delivery.

Claims

1. A method comprising:

forming a decoupling capacitor between a probe card and a wafer under test.

2. The method of claim 1 including forming said capacitor in association with a space transformer.

3. The method of claim 2 including forming said capacitor on the probe side of said space transformer.

4. The method of claim 1 including forming said capacitor on a secondary substrate.

5. The method of claim 4 including forming said capacitor on the probe side of said secondary substrate.

6. The method of claim 1 including forming said capacitor having a capacitance density of at least 1.0 microfarads per square centimeter.

7. An electrical testing device comprising:

a probe card;

a structure secured to said probe card;

probes extending from said structure; and

a capacitor formed in association with said structure.

8. The device of claim 7 wherein said structure includes a space transformer, said capacitor formed in connection with said space transformer.

9. The device of claim 8 wherein said capacitance is formed on the probe side of said space transformer.

10. The device of claim 7 wherein said structure includes a secondary substrate, the capacitor formed in association with said secondary substrate.

11. The device of claim 10 wherein the capacitor is formed on the probe side of said secondary substrate.

12. The device of claim 7 wherein said capacitor has a capacitance density of at least 1.0 microfarads per square centimeter.

13. A method comprising:

securing a structure to the probe side of a probe card; and

forming a capacitor having a capacitance density of at least 1.0 microfarads per square centimeter on said structure.

14. The method of claim 13 including forming a structure including a space transformer.

15. The method of claim 14 including depositing said capacitor on the probe side of said space transformer.

16. The method of claim 13 including forming a structure including a space transformer and a secondary substrate.

17. The method of claim 16 including forming a capacitor by depositing said capacitor on the probe side of said secondary substrate.

18. A probe card comprising:

a plurality of probes; and

a decoupling capacitor having a capacitance density of greater than 1.0 microfarads per square centimeter.

19. The card of claim 18, said card having a space transformer having a probe side, wherein said capacitor is formed on the probe side of a space transformer.

20. The card of claim 18, said card having a secondary substrate, having a probe side and said capacitor formed on said secondary substrate.

21. The card of claim 20 including forming said capacitor on the probe side of said secondary substrate.