DIGITAL MICROMIRROR DEVICE AND METHOD OF DRIVING DIGITAL MICROMIRROR DEVICE

• US 20070146258A1
• Filed: 09/18/2006
• Published: 06/28/2007
• Est. Priority Date: 07/11/2000
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Koyama, Jun, Yamazaki, Shunpei
• Granted Patent: US 7,248,393 B2
• Time in Patent Office: Days
• US Class Current: 345/85
• CPC Class Codes: G02B 26/0833 the reflecting element being a micromechanical device, e.g. a MEMS mirror, DMD G02B26/0825 takes precedence; micromechanical devices in general B81B
• CPC Class Codes: G02B 26/0841 the reflecting element being moved or deformed by electrostatic means
• CPC Class Codes: G09G 2300/0809 Several active elements per pixel in active matrix panels
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0857 Static memory circuit, e.g. flip-flop
• CPC Class Codes: G09G 2310/0262 The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
• CPC Class Codes: G09G 2310/0267 Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
• CPC Class Codes: G09G 2310/0275 Details of drivers for data electrodes, other than drivers for liquid crystal, plasma or OLED displays, not related to handling digital grey scale data or to communication of data to the pixels by means of a current
• CPC Class Codes: G09G 2310/061 for resetting or blanking
• CPC Class Codes: G09G 2320/0247 Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
• CPC Class Codes: G09G 2340/0428 Gradation resolution change
• CPC Class Codes: G09G 3/2022 using sub-frames
• CPC Class Codes: G09G 3/346 based on modulation of the reflection angle, e.g. micromirrors micromirrors devices per se G02B26/0833

Abstract

A spatial light modulation device capable of displaying a large number of gray scales is provided. The inventors of the present invention proposed a spatial light modulation device having: a first structure in which a switching transistor and an erasure transistor, each having its gate electrode connected to a different scanning line, are formed in each pixel, and whose switching is controlled separately; or a second structure in which two switching transistors, each having its gate electrode connected to a different scanning line, are formed in each pixel, and whose switching is controlled separately.

Claims

1. A projector comprising:

a first electrode and a second electrode;

a micromirror located over said first electrode and second electrode;

a first switching element;

a second switching element; and

a memory electrically connected to the first and second switching elements and including transistors distinct from the first and second switching elements,

wherein;

an output of said first switching element is electrically connected to said first electrode;

an output of said second switching element is electrically connected to said second electrode;

an input of said memory is electrically connected to said first electrode; and

an output of said memory is electrically connected to said second electrode.

18. A projector according to claim 1, wherein said first switching element is a first transistor and said second switching element is a second transistor.

23. A projector according to claim 18, wherein a first gate electrode of said first transistor is electrically connected to a first signal line and said second gate electrode of said second transistor is electrically connected to a second signal line.

28. A projector according to claim 1, wherein the voltages of the input and the output of said memory mutually differ.

2. A projector comprising:

a micromirror;

a first electrode and a second electrode for changing the inclination of the micromirror;

a first switching element;

a second switching element; and

a memory electrically connected to the first and second switching elements and including transistors distinct from the first and second switching elements,

wherein;

an output of said first switching element is electrically connected to said first electrode;

an output of said second switching element is electrically connected to said second electrode;

wherein;

an input of said memory is electrically connected to said first electrode.

an output of said memory is electrically connected to said second electrode.

6. The projector according to claim 2, wherein the memory comprises two p-channel transistors and two n-channel transistors.

10. The projector according to claim 2, wherein the memory comprises two p-channel transistors and two n-channel transistors.

14. The projector according to claim 2, wherein the memory comprises two p-channel transistors and two n-channel transistors.

19. A projector according to claim 2, wherein said first switching element is a first transistor and said second switching element is a second transistor.

24. A projector according to claim 19, wherein a first gate electrode of said first transistor is electrically connected to a first signal line and said second gate electrode of said second transistor is electrically connected to a second signal line.

29. A projector according to claim 2, wherein the voltages of the input and the output of said memory mutually differ.

3. A projector comprising:

a micromirror;

a first electrode and a second electrode for changing the inclination of said micromirror;

a first switching element;

a second switching element;

a memory electrically connected to the first and second switching elements and including transistors distinct from the first and second switching elements,

wherein;

a second voltage is imparted to said second electrode by said memory when a first voltage is imparted to said first electrode by said first switching element;

said first voltage is imparted to said second electrode by said memory when said second voltage is imparted to said first electrode by said first switching element;

said first voltage is imparted to said first electrode by said memory when said second voltage is imparted to said second electrode by said second switching element;

a switching of said first switching element is controlled by a first signal; and

a switching of said second switching element is controlled by a second signal.

7. The projector according to claim 3, wherein the memory comprises two p-channel transistors and two n-channel transistors.

11. The projector according to claim 3, wherein the memory comprises two p-channel transistors and two n-channel transistors.

15. The projector according to claim 3, wherein the memory comprises two p-channel transistors and two n-channel transistors.

20. A projector according to claim 3, wherein said first switching element is a first transistor and said second switching element is a second transistor.

25. A projector according to claim 20, wherein a first gate electrode of said first transistor is electrically connected to a first signal line and said second gate electrode of said second transistor is electrically connected to a second signal line.

4. A projector comprising:

a micromirror;

a first electrode and a second electrode for changing the inclination of said micromirror;

a first switching element for imparting a first voltage or a second voltage to said first electrode;

a second switching element for imparting said first voltage or said second voltage to said second electrode; and

a memory electrically connected to the first and second switching elements and including transistors distinct from the first and second switching elements,

wherein the memory imparts of said second voltage to one of said first electrode and said second electrode, when said first voltage is imparted to the other one of electrodes, and the memory imparts said first voltage to one of said first electrode and said second electrode, when said second voltage is imparted to the other one of said electrodes.

8. The projector according to claim 4, wherein the memory comprises two p-channel transistors and two n-channel transistors.

12. The projector according to claim 4, wherein the memory comprises two p-channel transistors and two n-channel transistors.

16. The projector according to claim 4, wherein the memory comprises two p-channel transistors and two n-channel transistors.

21. A projector according to claim 4, wherein said first switching element is a first transistor and said second switching element is a second transistor.

26. A projector according to claim 21, wherein a first gate electrode of said first transistor is electrically connected to a first signal line and said second gate electrode of said second transistor is electrically connected to a second signal line.

5. A projector comprising:

a micromirror;

a first electrode and a second electrode for changing the inclination of said micromirror;

a first switching element for imparting a first voltage or said second voltage to said second electrode; and

a second switching element for imparting said first voltage or said second voltage to said second electrode; and

a memory electrically connected to the first and second switching elements and including transistors distinct from the first and second switching elements,

wherein the memory imparts said second voltage to one of said first electrode and said second electrode, when said first voltage is imparted to the other one of electrodes, and the memory imparts said first voltage to one of said first electrode and said second electrode, when said second voltage is imparted to the other one of the electrodes;

wherein;

a switching of said first switching element is controlled by a first signal, and

a switching of said second switching element is controlled by a second signal.

9. The projector according to claim 5, wherein the memory comprises two p-channel transistors and two n-channel transistors.

13. The projector according to claim 5, wherein the memory comprises two p-channel transistors and two n-channel transistors.

17. The projector according to claim 5, wherein the memory comprises two p-channel transistors and two n-channel transistors.

22. A projector according to claim 5, wherein said first switching element is a first transistor and said second switching element is a second transistor.

27. A projector according to claim 22, wherein a first gate electrode of said first transistor is electrically connected to a first signal line and said second gate electrode of said second transistor is electrically connected to a second signal line.