Display device

• US 20070146265A1
• Filed: 02/12/2007
• Published: 06/28/2007
• Est. Priority Date: 07/21/1999
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Koyama, Jun, Yamazaki, Shunpei, Yamagata, Hirokazu
• Granted Patent: US 7,995,015 B2
• Time in Patent Office: Days
• US Class Current: 345/87
• CPC Class Codes: G02F 1/13454 Drivers integrated on the active matrix substrate G02F1/136277 takes precedence
• CPC Class Codes: G02F 1/136222 Colour filters incorporated in the active matrix substrate
• CPC Class Codes: G09G 2300/0408 Integration of the drivers onto the display substrate
• CPC Class Codes: G09G 2310/027 Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
• CPC Class Codes: G09G 2310/0289 Details of voltage level shifters arranged for use in a driving circuit
• CPC Class Codes: G09G 2320/0209 Crosstalk reduction, i.e. to reduce direct or indirect influences of signals directed to a certain pixel of the displayed image on other pixels of said image, inclusive of influences affecting pixels in different frames or fields or sub-images which constitute a same image, e.g. left and right images of a stereoscopic display
• CPC Class Codes: G09G 2320/0219 Reducing feedthrough effects in active matrix panels, i.e. voltage changes on the scan electrode influencing the pixel voltage due to capacitive coupling
• CPC Class Codes: G09G 2320/0233 Improving the luminance or brightness uniformity across the screen
• CPC Class Codes: G09G 2320/0247 Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
• CPC Class Codes: G09G 2340/0435 Change or adaptation of the frame rate of the video stream
• CPC Class Codes: G09G 3/3614 Control of polarity reversal in general
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: G09G 3/3666 with the matrix divided into sections
• CPC Class Codes: G09G 3/3677 suitable for active matrices only
• CPC Class Codes: G09G 3/3688 suitable for active matrices only
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/127 with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
• CPC Class Codes: H01L 29/78672 Polycrystalline or microcrystalline silicon transistor

Abstract

Display bright in contrast can be obtained without discrination and flicker in the display device of the direct vision type whose pixel pitches are short to 20 μm or less. A liquid crystal panel is driven through the frame inverse driving method, and the vertical frame frequency is set to 120 Hz or more. Also, each of the pixels is arranged to correspond to one of R, G and B of color filters disposed on a TFT substrate side.

Claims

1-40. -40. (canceled)

41. An active matrix display device comprising:

a plurality of source signal lines over a substrate;

a plurality of gate signal lines over the substrate;

a transistor provided over the substrate;

a planarizing layer formed over the transistor; and

a pixel electrode formed over the planarizing layer, which is electrically connected to one of the plurality of source signal lines through the transistor,

wherein a gate of the transistor is electrically connected to one of the plurality of gate signal lines,

wherein a first video signal is supplied to the pixel electrode through the one of the plurality of source signal lines in a first frame period,

wherein a second video signal having a polarity opposite to the first video signal is supplied to the pixel electrode through the one of the plurality of source signal lines in a second frame period, and

wherein a frame frequency is set to 120 Hz or more.

42. The active matrix display device according to claim 41, wherein intervals of the plurality of gate signal lines or the plurality of source signal lines are set to 20 μ

m or less.

43. The active matrix display device according to claim 41, wherein the second frame period is subsequent to the first frame period.

44. The active matrix display device according to claim 41 further comprising a second substrate having colored layers.

45. The active matrix display device according to claim 41, wherein liquid crystal is disposed between the substrate and the second substrate.

46. The active matrix display device according to claim 41, wherein a surface of the planarizing layer has no irregularity.

47. The active matrix display device according to claim 41, wherein a thickness of the planarizing layer is between 1.0 μ

m and 1.5 μ

m.

48. The active matrix display device according to claim 41, wherein the planarizing layer comprises an organic resin.

49. The active matrix display device according to claim 48, wherein the organic resin is selected from the group consisting of polyimide, acrylic, polyamide, polyimideamide and benzocyclobutene.

50. The active matrix display device according to claim 41, wherein the transistor is a thin film transistor.

51. The active matrix display device according to claim 50, wherein the thin film transistor is an inverse-stagger type thin film transistor.

52. The active matrix display device according to claim 50, wherein the thin film transistor is a polycrystal silicon thin film transistor.

53. An active matrix display device comprising:

a plurality of source signal lines over a substrate;

a plurality of gate signal lines over the substrate;

a transistor provided over the substrate;

an organic resin layer formed over the transistor; and

a pixel electrode formed over the organic resin layer, which is electrically connected to one of the plurality of source signal lines through the transistor,

wherein a gate of the transistor is electrically connected to one of the plurality of gate signal lines,

wherein a first video signal is supplied to the pixel electrode through the one of the plurality of source signal lines in a first frame period,

wherein a second video signal having a polarity opposite to the first video signal is supplied to the pixel electrode through the one of the plurality of source signal lines in a second frame period, and

wherein a frame frequency is set to 120 Hz or more.

54. The active matrix display device according to claim 53, wherein intervals of the plurality of gate signal lines or the plurality of source signal lines are set to 20 μ

m or less.

55. The active matrix display device according to claim 53, wherein the second frame period is subsequent to the first frame period.

56. The active matrix display device according to claim 53 further comprising a second substrate having colored layers.

57. The active matrix display device according to claim 56, wherein liquid crystal is disposed between the substrate and the second substrate.

58. The active matrix display device according to claim 53, wherein the organic resin layer comprises an organic resin selected from the group consisting of polyimide, acrylic, polyamide, polyimideamide and benzocyclobutene.

59. The active matrix display device according to claim 53, wherein a thickness of the organic resin layer is between 1.0 μ

m and 1.5 μ

m.

60. The active matrix display device according to claim 53, wherein the transistor is a thin film transistor.

61. The active matrix display device according to claim 60, wherein the thin film transistor is an inverse-stagger type thin film transistor.

62. The active matrix display device according to claim 60, wherein the thin film transistor is a polycrystal silicon thin film transistor.

63. A driving method of an active matrix display device,

the active matrix display device comprising:

a plurality of source signal lines over a substrate;

a plurality of gate signal lines over the substrate;

a transistor provided over the substrate, a gate of which is electrically connected to one of the plurality of gate signal lines;

an insulating layer formed over the transistor; and

a pixel electrode formed over the insulating layer, which is electrically connected to one of the plurality of source signal lines through the transistor,

the method comprising;

supplying a first video signal to the pixel electrode through the one of the plurality of source signal lines in a first frame period, and

supplying a second video signal having a polarity opposite to the first video signal to the pixel electrode through the one of the plurality of source signal lines in a second frame period,

wherein a frame frequency is set to 120 Hz or more, and

wherein the insulating layer has a planarized surface.

64. The driving method according to claim 63, wherein the second frame period is subsequent to the first frame period.

65. The driving method according to claim 63, wherein the planarized surface has no irregularity.

66. An active matrix display device comprising:

a plurality of source signal lines over a substrate;

a plurality of gate signal lines over the substrate;

a transistor provided over the substrate;

an insulating layer formed over the transistor; and

a pixel electrode formed over the insulating layer, which is electrically connected to one of the plurality of source signal lines through the transistor,

wherein a gate of the transistor is electrically connected to one of the plurality of gate signal lines,

wherein a first video signal is supplied to the pixel electrode through the one of the plurality of source signal lines in a first frame period,

wherein a second video signal having a polarity opposite to the first video signal is supplied to the pixel electrode through the one of the plurality of source signal lines in a second frame period,

wherein a frame frequency is set to 120 Hz or more, and

wherein each of the plurality of source signal lines comprises aluminum.

67. The active matrix display device according to claim 66, wherein intervals of the plurality of gate signal lines or the plurality of source signal lines are set to 20 μ

m or less.

68. The active matrix display device according to claim 66, wherein the second frame period is subsequent to the first frame period.

69. The active matrix display device according to claim 66 further comprising a second substrate having colored layers.

70. The active matrix display device according to claim 66, wherein liquid crystal is disposed between the substrate and the second substrate.

71. The active matrix display device according to claim 66, wherein the transistor is a thin film transistor.

72. The active matrix display device according to claim 71, wherein the thin film transistor is an inverse-stagger type thin film transistor.

73. The active matrix display device according to claim 71, wherein the thin film transistor is a polycrystal silicon thin film transistor.

74. The active matrix display device according to claim 66, wherein each of the plurality of source signal lines further comprises titanium.

75. The active matrix display device according to claim 66, wherein each of the plurality of source signal lines further comprises tantalum.

76. The active matrix display device according to claim 66, wherein each of the plurality of source signal lines further comprises tungsten.

77. The active matrix display device according to claim 74, wherein each of the plurality of source signal lines comprises a first layer mainly comprising aluminum and a second layer mainly comprising titanium.

78. The active matrix display device according to claim 75, wherein each of the plurality of source signal lines comprises a first layer mainly comprising aluminum and a second layer mainly comprising tantalum.

79. The active matrix display device according to claim 76, wherein each of the plurality of source signal lines comprises a first layer mainly comprising aluminum and a second layer mainly comprising tungsten.

80. The active matrix display device according to claim 66, wherein the insulating layer is a passivation film.

81. The active matrix display device according to claim 66, wherein the insulating layer comprises silicon nitride.

82. The active matrix display device according to claim 66, wherein the insulating layer comprises silicon oxide.

83. The active matrix display device according to claim 66, wherein the insulating layer comprises silicon oxynitride.

84. An active matrix display device comprising:

a plurality of source signal lines over a substrate;

a plurality of gate signal lines over the substrate;

a transistor provided over the substrate;

an insulating layer formed over the transistor; and

a pixel electrode formed over the insulating layer, which is electrically connected to one of the plurality of source signal lines through the transistor,

wherein a gate of the transistor is electrically connected to one of the plurality of gate signal lines,

wherein a first video signal is supplied to the pixel electrode through the one of the plurality of source signal lines in a first frame period,

wherein a second video signal having a polarity opposite to the first video signal is supplied to the pixel electrode through the one of the plurality of source signal lines in a second frame period,

wherein a frame frequency is set to 120 Hz or more, and

wherein each of the plurality of source signal lines comprises cupper.

85. The active matrix display device according to claim 84, wherein intervals of the plurality of gate signal lines or the plurality of source signal lines are set to 20 μ

m or less.

86. The active matrix display device according to claim 84, wherein the second frame period is subsequent to the first frame period.

87. The active matrix display device according to claim 84 further comprising a second substrate having colored layers.

88. The active matrix display device according to claim 87, wherein liquid crystal is disposed between the substrate and the second substrate.

89. The active matrix display device according to claim 84, wherein the transistor is a thin film transistor.

90. The active matrix display device according to claim 89, wherein the thin film transistor is an inverse-stagger type thin film transistor.

91. The active matrix display device according to claim 89, wherein the thin film transistor is a polycrystal silicon thin film transistor.

92. The active matrix display device according to claim 84, wherein each of the plurality of source signal lines further comprises titanium.

93. The active matrix display device according to claim 84, wherein each of the plurality of source signal lines further comprises tantalum.

94. The active matrix display device according to claim 84, wherein each of the plurality of source signal lines further comprises tungsten.

95. The active matrix display device according to claim 92, wherein each of the plurality of source signal lines comprises a first layer mainly comprising cupper and a second layer mainly comprising titanium.

96. The active matrix display device according to claim 93, wherein each of the plurality of source signal lines comprises a first layer mainly comprising cupper and a second layer mainly comprising tantalum.

97. The active matrix display device according to claim 94, wherein each of the plurality of source signal lines comprises a first layer mainly comprising cupper and a second layer mainly comprising tungsten.

98. The active matrix display device according to claim 84, wherein the insulating layer is a passivation film.

99. The active matrix display device according to claim 84, wherein the insulating layer comprises silicon nitride.

100. The active matrix display device according to claim 84, wherein the insulating layer comprises silicon oxide.

101. The active matrix display device according to claim 84, wherein the insulating layer comprises silicon oxynitride.