Semiconductor device and method for manufacturing the same

• US 20070146566A1
• Filed: 12/14/2006
• Published: 06/28/2007
• Est. Priority Date: 12/26/2005
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Hosoya, Kunio
• Granted Patent: US 8,212,953 B2
• Time in Patent Office: Days
• US Class Current: 349/43
• CPC Class Codes: G02F 1/1362 Active matrix addressed cells G02F1/134336, G02F1/134363 take precedence
• CPC Class Codes: G02F 1/136227 Through-hole connection of the pixel electrode to the active element through an insulation layer
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: G02F 2201/50 Protective arrangements
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors

Abstract

It is an object to obtain a liquid crystal display device in which a contact defect is reduced, increase in contact resistance is suppressed, and an opening ratio is high. The present invention relates to a liquid crystal display device having a substrate; a thin film transistor provided over the substrate, which includes a gate wiring, a gate insulating film, an island-shaped semiconductor film, a source region, and a drain region; a source wiring which is provided over the substrate and is connected to the source region; a drain electrode which is provided over the substrate and is connected to the drain region; an auxiliary capacitor provided over the substrate; a pixel electrode connected to the drain electrode; and a protective film formed so as to cover the thin film transistor and the source wiring, where the protective film has an opening, and the auxiliary capacitor is formed in the area where the opening is formed.

Claims

1. A semiconductor device comprising:

a substrate;

a thin film transistor over the substrate, comprising;

a channel formation region;

a source region;

a drain region;

a gate insulating film; and

a gate electrode;

a gate wiring connected to the gate electrode;

a source wiring connected to the source region;

a drain electrode connected to the drain region;

an auxiliary capacitor provided over the substrate;

a pixel electrode connected to the drain electrode; and

an insulating film which covers the thin film transistor and the source wiring,

wherein the insulating film has an opening, and

wherein the pixel electrode and the auxiliary capacitor are formed in an area where the opening is formed.

4. A semiconductor device according to claim 1, further comprising:

a first alignment film formed over the thin film transistor, the pixel electrode, and the insulating film;

a counter substrate over the substrate;

a counter electrode formed under the counter substrate;

a second alignment film formed under the counter electrode; and

a liquid crystal between the first alignment film and the second alignment film.

5. A semiconductor device according to claim 1,

wherein the pixel electrode is a transparent electrode, and

wherein a reflective electrode is formed overlapping with part of the pixel electrode.

6. A semiconductor device according to claim 5, wherein the reflective electrode has any one of aluminum (Al), silver (Ag), and chromium (Cr).

7. A semiconductor device according to claim 4, further comprising:

a common wiring over the substrate, and

a plurality of common electrodes over the substrate and connected to the common wiring.

8. A semiconductor device according to claim 7, wherein the common wiring is formed of the same material and formed in the same layer as those of the gate wiring.

9. A semiconductor device according to claim 7, wherein the plurality of common electrodes are formed of the same material and formed in the same layer as those of the pixel electrode.

10. A semiconductor device according to claim 4, further comprising:

a plurality of grooves provided on the pixel electrode; and

a plurality of protrusions provided on the counter electrode.

11. A semiconductor device according to claim 4, further comprising:

a plurality of first grooves on the pixel electrode; and

a plurality of second grooves on the counter electrode.

12. A semiconductor deivce according to claim 11, wherein the first grooves do not overlap the second grooves.

13. A semiconductor device according to claim 1, wherein the auxiliary capacitor is formed using part of the gate wiring, the gate insulating film, and part of the pixel electrode.

14. A semiconductor device according to claim 1, wherein the auxiliary capacitor is formed of an auxiliary capacitor wiring which is formed of the same material as that of the gate wiring, the gate insulating film, and part of a conductive film which is formed of the same material as that of a drain electrode electrically connected to the pixel electrode.

17. A semiconductor device according to claim 1, wherein the insulating film is one of a silicon nitride film, a silicon nitride film containing oxygen, a silicon oxide film containing nitrogen, a silicon oxide film, and a stacked film in which these films are combined.

20. A semiconductor device according to claim 1, wherein the thin film transistor is a bottom gate thin film transistor.

21. A semiconductor device according to claim 1,

wherein the drain electrode includes an upper drain electrode and a lower drain electrode, and

wherein the pixel electrode is in contact with the lower drain electrode.

22. A semiconductor device according to claim 1,

wherein the drain electrode has an upper drain electrode, a middle drain electrode, and a lower drain electrode, and

wherein the pixel electrode is in contact with the upper drain electrode.

23. A semiconductor device according to claim 1, wherein the pixel electrode comprises any one of indium oxide, indium tin oxide, and indium oxide-zinc oxide alloy.

24. A semiconductor device according to claim 1, wherein the semiconductor device is one of a television receiving set, a cellular phone, a liquid crystal display, a computer, a game machine, an image reproducing device, a video camera, a navigation system, an audio reproducing device, and a digital still camera.

2. A semiconductor device comprising:

a substrate;

a thin film transistor over the substrate, comprising;

a pair of semiconductor layers each comprising an impurity; and

a channel formation region;

a first wiring electrically connected to one of the pair of semiconductor layers;

a first electrode electrically connected to the other of the pair of semiconductor layers;

a pixel electrode connected to the first electrode;

an auxiliary capacitor provided over the substrate; and

an insulating film covering the thin film transistor and the first wiring,

wherein the insulating film has an opening, and

wherein the pixel electrode and the auxiliary capacitor are formed in an area where the opening is formed.

18. A semiconductor device according to claim 2, wherein the insulating film is one of a silicon nitride film, a silicon nitride film containing oxygen, a silicon oxide film containing nitrogen, a silicon oxide film, and a stacked film in which these films are combined.

25. A semiconductor device according to claim 2, wherein the semiconductor device is one of a television receiving set, a cellular phone, a liquid crystal display, a computer, a game machine, an image reproducing device, a video camera, a navigation system, an audio reproducing device, and a digital still camera.

3. A semiconductor device comprising:

a substrate;

a first thin film transistor and a second thin film transistor provided over the substrate,

wherein the first thin film transistor comprises a first gate electrode, a gate insulating film, a first channel formation region, a first source region, and a first drain region,

wherein the second thin film transistor comprises a second gate electrode, the gate insulating film, a second channel formation region, a second source region, and a second drain region;

a first gate wiring connected to the first gate electrode;

a second gate wiring connected to the secomd gate electrode;

a source wiring which is provided over the substrate and is connected to the first source region and the second source region;

a first drain electrode which is provided over the substrate and is connected to the first drain region;

a second drain electrode which is provided over the substrate and is connected to the second drain region;

an auxiliary capacitor provided over the substrate;

a first pixel electrode connected to the first drain electrode;

a second pixel electrode connected to the second drain electrode; and

an auxiliary capacitor wiring formed of the same material and formed in the same layer as those of the first gate wiring and the second gate wiring,

wherein a first auxiliary capacitor is formed in a region where part of the first pixel electrode and the auxiliary capacitor wiring overlap with each other,

wherein a second auxiliary capacitor is formed in a region where part of the second pixel electrode and the auxiliary capacitor wiring overlap with each other;

an insulating film formed over the first thin film transistor, the second thin film transistor, and the source wiring;

an opening formed in the insulating film,

wherein the first thin film transistor, the second thin film transistor, and the source wiring are covered with the insulating film,

wherein the first auxiliary capacitor, and the second auxiliary capacitor are formed in an area where the opening is formed;

a first alignment film formed over the first thin film transistor, the second thin film transistor, the first pixel electrode, the second pixel electrode, and the insulating film;

a counter substrate over the substrate;

a counter electrode formed under the counter substrate;

a second alignment film formed under the counter electrode; and

a liquid crystal between the first alignement film and the second alignment film.

15. A semiconductor device according to claim 3, wherein an area of the first pixel electrode is the same as an area of the second pixel electrode.

16. A semiconductor device according to claim 3, wherein an area of the first pixel electrode and an area of the second pixel electrode are different.

19. A semiconductor device according to claim 3, wherein the insulating film is one of a silicon nitride film, a silicon nitride film containing oxygen, a silicon oxide film containing nitrogen, a silicon oxide film, and a stacked film in which these films are combined.

26. A semiconductor device according to claim 3, wherein the semiconductor device is one of a television receiving set, a cellular phone, a liquid crystal display, a computer, a game machine, an image reproducing device, a video camera, a navigation system, an audio reproducing device, and a digital still camera.

27. A method for manufacturing a semiconductor device, comprising:

forming a gate wiring over a substrate;

forming a gate insulating film over the gate wiring;

forming a semiconductor film and a semiconductor film comprising an impurity over the gate wiring, having the gate insulating film therebetween;

forming a source wiring and a drain electrode over the gate insulating film, the semiconductor film, and the semiconductor film comprising an impurity;

forming a source region and a drain region from the semiconductor film comprising an impurity and a channel formation region from the semiconductor film by etching the semiconductor film and the semiconductor film comprising an impurity by using the source wiring and the drain electrode as masks;

forming an insulating film over the source wiring, the drain electrode, the source region, the drain region, and the channel formation region;

removing part of the insulating film to expose at least part of the drain electrode; and

forming a pixel electrode in contact with the drain electrode,

wherein part of the insulating film over the source wiring, the source region, the drain region, and the channel formation region is not removed.

28. A method for manufacturing a semiconductor device according to claim 27, wherein the insulating film is one of a silicon nitride film, a silicon nitride film containing oxygen, a silicon oxide film containing nitrogen, a silicon oxide film, and a stacked film in which these films are combined.

29. A method for manufacturing a semiconductor device according to claim 27, wherein each of the semiconductor film and the semiconductor film comprising an impurity is formed using an amorphous semiconductor film.

30. A method for manufacturing a semiconductor device according to claim 27,

wherein the pixel electrode is a transparent electrode, and

wherein a reflective electrode is formed to overlap with part of the pixel electrode.