Method of fabricating array substrate for in-plane switching liquid crystal display device
First Claim
1. A method of fabricating an array substrate for an in-plane switching liquid crystal display device, comprising:
- forming a common electrode on a substrate using a double layer of a transparent material layer and an opaque material layer, the common electrode including a first transparent conductive material;
forming a gate line, a gate electrode and a common line on the substrate, the gate electrode being connected to the gate line, the common line contacting the common electrode;
forming a gate insulating layer on the gate line, the gate electrode and the common line;
forming an active layer and an ohmic contact layer on the gate insulating layer over the gate electrode;
forming source and drain electrodes on the ohmic contact layer and a data line connected to the source electrode, the source and drain electrodes being spaced apart from each other;
forming a passivation layer on the source and drain electrodes and the data line, the passivation layer including a drain contact hole exposing the drain electrode; and
forming a pixel electrode on the passivation layer, the pixel electrode including a second transparent conductive material and being formed in an alternating pattern with the common electrode, the pixel electrode contacting the drain electrode through the drain contact hole.
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Accused Products
Abstract
A method of fabricating an array substrate for an IPS mode LCD device includes: forming a common electrode using a double layer of a transparent material layer and an opaque material layer, the common electrode including a first transparent conductive material; forming source and drain electrodes on an ohmic contact layer and a data line connected to the source electrode, the source and drain electrodes being spaced apart from each other; forming a passivation layer on the source and drain electrodes and the data line, the passivation layer including a drain contact hole exposing the drain electrode; and forming a pixel electrode on the passivation layer, the pixel electrode including a second transparent conductive material and being formed in an alternating pattern with the common electrode.
37 Citations
11 Claims
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1. A method of fabricating an array substrate for an in-plane switching liquid crystal display device, comprising:
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forming a common electrode on a substrate using a double layer of a transparent material layer and an opaque material layer, the common electrode including a first transparent conductive material;
forming a gate line, a gate electrode and a common line on the substrate, the gate electrode being connected to the gate line, the common line contacting the common electrode;
forming a gate insulating layer on the gate line, the gate electrode and the common line;
forming an active layer and an ohmic contact layer on the gate insulating layer over the gate electrode;
forming source and drain electrodes on the ohmic contact layer and a data line connected to the source electrode, the source and drain electrodes being spaced apart from each other;
forming a passivation layer on the source and drain electrodes and the data line, the passivation layer including a drain contact hole exposing the drain electrode; and
forming a pixel electrode on the passivation layer, the pixel electrode including a second transparent conductive material and being formed in an alternating pattern with the common electrode, the pixel electrode contacting the drain electrode through the drain contact hole. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method of fabricating an array substrate for an in-plane switching liquid crystal display device, comprising:
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forming a common electrode on a substrate using a double layer of a transparent material layer and an opaque material layer, the common electrode including a transparent material;
forming a gate line and a common line on the substrate, the common line contacting the common electrode;
forming a data line crossing the gate line;
forming a thin film transistor connected to the gate line and the data line;
forming a passivation layer on the thin film transistor; and
forming a pixel electrode on the passivation layer, the pixel electrode being connected to the thin film transistor. - View Dependent Claims (8, 9, 10, 11)
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Specification