Semiconductor device and manufacturing method thereof

• US 20070147104A1
• Filed: 12/07/2006
• Published: 06/28/2007
• Est. Priority Date: 12/27/2005
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Saito, Toshihiko, Takano, Tamae, Kato, Kiyoshi
• Granted Patent: US 8,212,238 B2
• Time in Patent Office: Days
• US Class Current: 365/145
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: G11C 13/0014 comprising cells based on organic memory material
• CPC Class Codes: G11C 13/0028 Word-line or row circuits
• CPC Class Codes: G11C 2213/80 Array wherein the substrate, the cell, the conductors and the access device are all made up of organic materials
• CPC Class Codes: G11C 8/08 Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
• CPC Class Codes: G11C 8/10 Decoders
• CPC Class Codes: H10K 19/202 Integrated devices comprising a common active layer
• CPC Class Codes: H10K 85/111 comprising aromatic, heteroaromatic, or aryl chains, e.g. polyaniline, polyphenylene or polyphenylene vinylene
• CPC Class Codes: H10K 85/113 Heteroaromatic compounds comprising sulfur or selene, e.g. polythiophene
• CPC Class Codes: H10K 85/114 Poly-phenylenevinylene; Derivatives thereof
• CPC Class Codes: H10K 85/115 Polyfluorene; Derivatives thereof
• CPC Class Codes: H10K 85/311 Phthalocyanine
• CPC Class Codes: H10K 85/324 comprising aluminium, e.g. Alq3
• CPC Class Codes: H10K 85/615 Polycyclic condensed aromatic hydrocarbons, e.g. anthracene
• CPC Class Codes: H10K 85/622 containing four rings, e.g. pyrene
• CPC Class Codes: H10K 85/631 Amine compounds having at least two aryl rest on at least one amine-nitrogen atom, e.g. triphenylamine
• CPC Class Codes: H10K 85/6565 Oxadiazole compounds

Abstract

An object of the present invention to provide a semiconductor device having a highly functional memory element with improved reliability, and to provide a technique for manufacturing such a highly reliable semiconductor device with a high yield at low cost without complicating an apparatus or a process. As a top view shape of a memory element, a rectangular shape having a projection and a depression on the periphery, a zigzagged shape having one or plural bends, a comb shape, a ring shape having an opening (space) inside, or the like is used. Alternatively, a rectangle with a ratio of a long side to a short side being high, an ellipse with a ratio of a long axis to a short axis being high, or the like can also be used.

Claims

1. A semiconductor device comprising:

a memory element including a first conductive layer, a second conductive layer, and an organic compound layer interposed between the first conductive layer and the second conductive layer,

wherein at least one of the first conductive layer and the second conductive layer has a top view shape which is bent at least once.

2. The semiconductor device according to claim 1, wherein the top view shape which is bent at least once is a comb-shape.

3. The semiconductor device according to claim 1,

wherein a rectangle with a same area and a same perimeter as the top view shape which is bent at least once has a ratio of a long side to a short side of 3 or more.

4. The semiconductor device according to claim 1,

wherein a ratio of an area of the top view shape which is bent at least once to an area of a square with a same perimeter as the top view shape which is bent at least once is 0.75 or less.

5. The semiconductor device according to claim 1, wherein an insulating layer is provided between the first conductive layer and the organic compound layer.

6. A semiconductor device comprising:

a memory element including a first conductive layer, a second conductive layer, and an organic compound layer interposed between the first conductive layer and the second conductive layer,

wherein at least one of the first conductive layer and the second conductive layer has a top view ring-shape.

7. The semiconductor device according to claim 6,

wherein a rectangle with a same area and a same perimeter as the top view ring-shape has a ratio of a long side to a short side of 3 or more.

8. The semiconductor device according to claim 6,

wherein a ratio of an area of the top view ring-shape to an area of a square with a same perimeter as the top view ring-shape is 0.75 or less.

9. The semiconductor device according to claim 6, wherein an insulating layer is provided between the first conductive layer and the organic compound layer.

10. A semiconductor device comprising:

a memory element including a first conductive layer, a second conductive layer, and an organic compound layer interposed between the first conductive layer and the second conductive layer,

wherein at least one of the first conductive layer and the second conductive layer has a top view shape with a slit.

11. The semiconductor device according to claim 10,

wherein a rectangle with a same area and a same perimeter as the top view shape with the slit has a ratio of a long side to a short side of 3 or more.

12. The semiconductor device according to claim 10,

wherein a ratio of an area of the top view shape with the slit to an area of a square with a same perimeter as the top view shape with the slit is 0.75 or less.

13. The semiconductor device according to claim 10, wherein an insulating layer is provided between the first conductive layer and the organic compound layer.

14. A semiconductor device comprising:

a memory element including a first conductive layer, an insulating layer having an opening formed over the first conductive layer, an organic compound layer formed in the opening over the first conductive layer, and a second conductive layer formed over the organic compound layer,

wherein the opening has a top view shape which is bent at least once.

15. The semiconductor device according to claim 14, wherein the top view shape which is bent at least once is a comb-shape.

16. The semiconductor device according to claim 14,

wherein a rectangle with a same area and a same perimeter as the top view shape which is bent at least once has a ratio of a long side to a short side of 3 or more.

17. The semiconductor device according to claim 14,

wherein a ratio of an area of the top view shape which is bent at least once to an area of a square with a same perimeter as the top view shape which is bent at least once is 0.75 or less.

18. A semiconductor device comprising:

a memory element including a first conductive layer, an insulating layer having an opening formed over the first conductive layer, an organic compound layer formed in the opening over the first conductive layer, and a second conductive layer formed over the organic compound layer,

wherein the opening has a top view ring-shape.

19. The semiconductor device according to claim 18,

wherein a rectangle with a same area and a same perimeter as the top view ring-shape has a ratio of a long side to a short side of 3 or more.

20. The semiconductor device according to claim 18,

wherein a ratio of an area of the top view ring-shape to an area of a square with a same perimeter as the top view ring-shape is 0.75 or less.

21. A semiconductor device comprising:

a memory element including a first conductive layer, an insulating layer having an opening formed over the first conductive layer, an organic compound layer formed in the opening over the first conductive layer, and a second conductive layer formed over the organic compound layer,

wherein the opening has a top view shape with a slit.

22. The semiconductor device according to claim 21,

wherein a rectangle with a same area and a same perimeter as the top view shape with the slit has a ratio of a long side to a short side of 3 or more.

23. The semiconductor device according to claim 21,

wherein a ratio of an area of the top view shape with the slit to an area of a square with a same perimeter as the top view shape with the slit is 0.75 or less.

24. A method for manufacturing a semiconductor device including a memory element, the memory element comprising:

forming a first conductive layer having a top view shape which is bent at least once,

forming an organic compound layer over the first conductive layer having the top view shape which is bent at least once, and

forming a second conductive layer over the organic compound layer.

25. The method for manufacturing a semiconductor device according to claim 24, wherein the top view shape which is bent at least once is a comb-shape.

26. The method for manufacturing a semiconductor device according to claim 24,

wherein the top view shape which is bent at least once is formed so that a rectangle with a same area and a same perimeter as the top view shape which is bent at least once has a ratio of a long side to a short side of 3 or more.

27. The method for manufacturing a semiconductor device according to claim 24,

wherein the top view shape which is bent at least once is formed so that a ratio of an area of the top view shape which is bent at least once to an area of a square having a same area and a same perimeter as the top view shape which is bent at least once is 0.75 or less.

28. A method for manufacturing a semiconductor device including a memory element, the memory element comprising:

forming a first conductive layer having a top view ring-shape,

forming an organic compound layer over the first conductive layer having the top view ring-shape, and

forming a second conductive layer over the organic compound layer.

29. The method for manufacturing a semiconductor device according to claim 28,

wherein the top view ring-shape is formed so that a rectangle with a same area and a same perimeter as the top view ring-shape has a ratio of a long side to a short side of 3 or more.

30. The method for manufacturing a semiconductor device according to claim 28,

wherein the top view ring-shape is formed so that a ratio of an area of the top view ring-shape to an area of a square having a same area and a same perimeter as the top view ring-shape is 0.75 or less.

31. A method for manufacturing a semiconductor device including a memory element, the memory element comprising:

forming a first conductive layer having a top view shape with a slit,

forming an organic compound layer over the first conductive layer having the top view shape with the slit, and

forming a second conductive layer over the organic compound layer.

32. The method for manufacturing a semiconductor device according to claim 31,

wherein the top view shape with the slit is formed so that a rectangle with a same area and a same perimeter as the top view shape with the slit has a ratio of a long side to a short side of 3 or more.

33. The method for manufacturing a semiconductor device according to claim 31,

wherein the top view shape with the slit is formed so that a ratio of an area of the top view shape with the slit to an area of a square having a same area and a same perimeter as the top view shape with the slit is 0.75 or less.

34. A method for manufacturing a semiconductor device including a memory element, the memory element comprising:

forming a first conductive layer,

forming an insulating layer having an opening with a top view shape which is bent at least once over the first conductive layer,

forming an organic compound layer in the opening with the top view shape which is bent at least once over the first conductive layer, and

forming a second conductive layer over the organic compound layer.

35. The method for manufacturing a semiconductor device according to claim 34, wherein the top view shape which is bent at least once is a comb-shape.

36. The method for manufacturing a semiconductor device according to claim 34,

wherein the top view shape which is bent at least once is formed so that a rectangle with a same area and a same perimeter as the top view shape which is bent at least once has a ratio of a long side to a short side of 3 or more.

37. The method for manufacturing a semiconductor device according to claim 34,

wherein the top view shape which is bent at least once is formed so that a ratio of an area of the top view shape which is bent at least once to an area of a square having a same area and a same perimeter as the top view shape which is bent at least once is 0.75 or less.

38. A method for manufacturing a semiconductor device including a memory element, the memory element, comprising:

forming a first conductive layer,

forming an insulating layer having an opening with a top view ring-shape over the first conductive layer,

forming an organic compound layer in the opening over the first conductive layer, and

forming a second conductive layer over the organic compound layer.

39. The method for manufacturing a semiconductor device according to claim 38,

wherein the top view ring-shape is formed so that a rectangle with a same area and a same perimeter as the top view ring-shape has a ratio of a long side to a short side of 3 or more.

40. The method for manufacturing a semiconductor device according to claim 38,

wherein the top view ring-shape is formed so that a ratio of an area of the top view ring-shape to an area of a square having a same area and a same perimeter as the top view ring-shape is 0.75 or less.

41. A method for manufacturing a semiconductor device including a memory element, the memory element, comprising:

forming a first conductive layer,

forming an insulating layer having an opening with a top view shape with a slit over the first conductive layer,

forming an organic compound layer in the opening over the first conductive layer, and

forming a second conductive layer over the organic compound layer.

42. The method for manufacturing a semiconductor device according to claim 41,

wherein the top view shape with the slit is formed so that a rectangle with a same area and a same perimeter as the top view shape with the slit has a ratio of a long side to a short side of 3 or more.

43. The method for manufacturing a semiconductor device according to claim 41,

wherein the top view shape with the slit is formed so that a ratio of an area of the top view shape with the slit to an area of a square having a same area and a same perimeter as the top view shape with the slit is 0.75 or less.