Memory with output control
First Claim
1. A semiconductor memory device comprising:
- memory;
a serial data link interface configured to receive serial input data at a serial data input port, and to transfer serial data to a serial data output port;
a control input for receiving an output enable signal that is used to enable the memory device to transfer the serial data to the serial data output port; and
control circuitry responsive to the output enable signal that controls data transfer on the serial data output port.
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Accused Products
Abstract
An apparatus, system, and method for controlling data transfer to an output port of a serial data link interface in a semiconductor memory is disclosed. In one example, a flash memory device may have multiple serial data links, multiple memory banks and control input ports that enable the memory device to transfer the serial data to a serial data output port of the memory device. In another example, a flash memory device may have a single serial data link, a single memory bank, a serial data input port, a control input port for receiving output enable signals. The flash memory devices may be cascaded in a daisy-chain configuration using echo signal lines to serially communicate between memory devices.
150 Citations
44 Claims
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1. A semiconductor memory device comprising:
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memory;
a serial data link interface configured to receive serial input data at a serial data input port, and to transfer serial data to a serial data output port;
a control input for receiving an output enable signal that is used to enable the memory device to transfer the serial data to the serial data output port; and
control circuitry responsive to the output enable signal that controls data transfer on the serial data output port. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21)
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22. A semiconductor memory device comprising:
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memory;
a serial data link interface configured to receive serial input data at a serial data input port, and to transfer serial data to a serial data output port;
a first control input for receiving an output enable signal that is used to enable the memory device to transfer the serial data to the serial data output port;
a second control input for receiving an input enable signal that is used to enable the memory device to receive the serial input data;
a clock input for receiving a clock signal; and
control circuitry responsive to the output enable signal that controls data transfer on the serial data output port and to the input enable signal that enables the device to receive the serial input data. - View Dependent Claims (23, 24, 25, 26, 27, 28, 29)
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30. A method of controlling data transfer from a serial link interface in a semiconductor memory device, the method comprising:
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receiving an output enable signal at a control input;
enabling the output of serial output data based on the output enable signal; and
sending a serial output data stream from the serial data link interface. - View Dependent Claims (31, 32, 33)
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34. A flash memory system having a plurality of serially connected flash memory devices comprising:
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a first flash memory device having a serial data input port, a serial data output port, and a control input port, the first flash memory device configured to receive serial input data and an output enable signal from an external source device, and to send serial output data based on the output enable signal; and
a second flash memory device having a serial data input port, the second flash memory device configured to receive serial input data from the first flash memory device. - View Dependent Claims (35, 36, 37, 38, 39, 40, 41, 42, 43, 44)
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Specification