Configurable inputs and outputs for memory stacking system and method
First Claim
Patent Images
1. A memory device comprising:
- a die having a circuit configured to be enabled by a control signal;
an input pin configured to receive the control signal; and
a path selector arranged between the input pin and the circuit and configured to select a signal path to the circuit from the input pin.
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Abstract
Embodiments of the present invention relate to configurable inputs and/or outputs for memory and memory stacking applications. More specifically, embodiments of the present invention include memory devices that include a die having a circuit configured for enablement by a particular signal, an input pin configured to receive the particular signal, and a path selector configured to selectively designate a signal path to the circuit from the input pin.
60 Citations
25 Claims
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1. A memory device comprising:
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a die having a circuit configured to be enabled by a control signal;
an input pin configured to receive the control signal; and
a path selector arranged between the input pin and the circuit and configured to select a signal path to the circuit from the input pin. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A memory module comprising:
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a die stack comprising a plurality of memory devices;
a plurality pins disposed within the plurality of memory devices, wherein each of the plurality of pins is configured to receive at least one of a plurality of signals;
a plurality of circuits disposed within each of the plurality of memory devices, wherein each of the plurality of circuits is configured to be enabled by control signals of the plurality of signals; and
a plurality of path selectors configured to selectively provide communicative coupling between the plurality of pins and the plurality of circuits based on the control signals that enable each of the plurality of circuits. - View Dependent Claims (9, 10, 11, 12, 13, 14, 15)
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16. A computer system comprising:
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a processor; and
a memory system coupled to the processor and comprising;
a memory controller;
a memory device having a circuit configured to be enabled by a control signal;
an input pin disposed within the memory device and configured to receive the control signal; and
a path selector arranged between the input pin and the circuit and configured to select a signal path to the circuit from the input pin. - View Dependent Claims (17, 18, 19, 20, 21)
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22. A method of manufacturing memory, comprising:
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providing a plurality of memory die having a fuse controlled path selector within each of the memory die; and
enabling communication paths to circuits within each memory die based on enablement requirements of the circuits. - View Dependent Claims (23, 25)
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24. (canceled)
Specification