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Method and apparatus for detecting defects in integrated circuit die from stimulation of statistical outlier signatures

  • US 20070157056A1
  • Filed: 12/29/2005
  • Published: 07/05/2007
  • Est. Priority Date: 12/29/2005
  • Status: Active Grant
First Claim
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1. A method comprising steps of:

  • (a) receiving as input a test value of an electrical parameter measured for each of a plurality of identically designed electrical circuits;

    (b) identifying one of the identically designed electrical circuits as an outlier for which the test value of the electrical parameter varies from a mean test value of the electrical parameter for the plurality of identically designed electrical circuits by at least a selected difference;

    (c) monitoring the test value while subjecting a location on the outlier to a stimulus to detect a change in the test value as a function of the location; and

    (d) generating as output the location for which the change in the test value is detected to identify a defect in the outlier.

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