Method and apparatus for detecting defects in integrated circuit die from stimulation of statistical outlier signatures

• US 20070157056A1
• Filed: 12/29/2005
• Published: 07/05/2007
• Est. Priority Date: 12/29/2005
• Status: Active Grant

• Current Assignee: Bell Semiconductor, LLC (Hilco Inc. (d/b/a Hilco Global))
• Original Assignee: LSI Logic Corporation (Broadcom, Inc.)
• Inventors: Benware, Robert, Haehn, Steven
• Granted Patent: US 7,617,427 B2
• Time in Patent Office: Days
• US Class Current: 714/724
• CPC Class Codes: G01R 31/2894 Aspects of quality control [QC] G01R31/31718 takes precedence; program control for QC G05B19/41875
• CPC Class Codes: G01R 31/303 of integrated circuits G01R31/305 - G01R31/315 take precedence
• CPC Class Codes: H01L 22/14 for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
• CPC Class Codes: H01L 22/20 Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps

Abstract

A method and computer program for detecting and locating defects in integrated circuit die from stimulation of statistical outlier signatures includes receiving as input a test value of an electrical parameter measured for each of a plurality of identically designed electrical circuits, identifying one of the identically designed electrical circuits as an outlier for which the test value of the electrical parameter varies from a mean test value of the electrical parameter for the plurality of identically designed electrical circuits by at least a selected difference, monitoring the test value while subjecting a location on the outlier to a stimulus to detect a change in the test value as a function of the location, and generating as output the location for which the change in the test value is detected to identify a defect in the outlier.

Claims

1. A method comprising steps of:

(a) receiving as input a test value of an electrical parameter measured for each of a plurality of identically designed electrical circuits;

(b) identifying one of the identically designed electrical circuits as an outlier for which the test value of the electrical parameter varies from a mean test value of the electrical parameter for the plurality of identically designed electrical circuits by at least a selected difference;

(c) monitoring the test value while subjecting a location on the outlier to a stimulus to detect a change in the test value as a function of the location; and

(d) generating as output the location for which the change in the test value is detected to identify a defect in the outlier.

2. The method of claim 1 wherein step (c) comprises subjecting the outlier to a beam of at least one of optical radiation, thermal radiation, and charged particles.

3. The method of claim 1 wherein step (a) comprises measuring an electrical parameter comprising at least one of minimum operating voltage, maximum operating voltage, minimum operating frequency, maximum operating frequency, static leakage current, and dynamic leakage current.

4. The method of claim 3 comprising measuring the electrical parameter as a function of at least one of a test vector, a clock cycle, a supply voltage, and a device logic state.

5. The method of claim 1 comprising calculating the selected difference as a multiple of a standard deviation of the electrical parameter for the plurality of identically designed electrical circuits.

6. The method of claim 1 wherein step (c) comprises applying the stimulus to one of a plurality of scanned coordinates on the outlier.

7. The method of claim 1 wherein step (c) comprises applying the stimulus to successively smaller areas on the outlier.

8. The method of claim 1 wherein step (a) comprises measuring the electrical parameter for each of a plurality of identically designed electrical circuits having no stuck-at faults.

9. The method of claim 1 wherein step (a) comprises measuring the electrical parameter for each of a plurality of identically designed electrical circuits having no transition delay faults.

10. The method of claim 1 wherein step (a) comprises measuring a test value of an electrical parameter that does not include operating current.

11. A computer program product comprising:

a medium for embodying a computer program for input to a computer; and

a computer program embodied in the medium for causing the computer to perform steps of;

(a) receiving as input a test value of an electrical parameter measured for each of a plurality of identically designed electrical circuits;

(b) identifying one of the identically designed electrical circuits as an outlier for which the test value of the electrical parameter varies from a mean test value of the electrical parameter for the plurality of identically designed electrical circuits by at least a selected difference;

(c) monitoring the test value while subjecting a location on the outlier to a stimulus to detect a change in the test value as a function of the location; and

(d) generating as output the location for which the change in the test value is detected to identify a defect in the outlier.

12. The computer program product of claim 11 wherein step (c) comprises subjecting the outlier to a beam of at least one of optical radiation, thermal radiation, and charged particles.

13. The computer program product of claim 11 wherein step (a) comprises measuring an electrical parameter comprising at least one of minimum operating voltage, maximum operating voltage, minimum operating frequency, maximum operating frequency, static leakage current, and dynamic leakage current.

14. The computer program product of claim 13 comprising measuring the electrical parameter as a function of at least one of a test vector, a clock cycle, a supply voltage, and a device logic state.

15. The computer program product of claim 11 comprising calculating the selected difference as a multiple of a standard deviation of the electrical parameter for the plurality of identically designed electrical circuits.

16. The computer program product of claim 11 wherein step (c) comprises applying the stimulus to one of a plurality of scanned coordinates on the outlier.

17. The computer program product of claim 11 wherein step (c) comprises applying the stimulus to successively smaller areas on the outlier.

18. The computer program product of claim 11 wherein step (a) comprises measuring the electrical parameter for each of a plurality of identically designed electrical circuits having no stuck-at faults.

19. The computer program product of claim 11 wherein step (a) comprises measuring the electrical parameter for each of a plurality of identically designed electrical circuits having no transition delay faults.

20. The computer program product of claim 11 wherein step (a) comprises measuring a test value of an electrical parameter that does not include operating current.

21. An apparatus comprising:

a measuring apparatus for measuring a test value of an electrical parameter for each of a plurality of identically designed electrical circuits to identify an outlier;

an apparatus for subjecting the outlier to a stimulus; and

a monitoring device for monitoring the test value while subjecting a location on the outlier to a stimulus to detect a change in the test value as a function of the location.