Operation frame filtering, building, and execution
First Claim
Patent Images
1. A method comprising:
- identifying a first sequence of instructions operations by an execution core and caching a frame signature, wherein the frame signature is a unique identifier of the first sequence of operations;
counting occurrences of the first sequence of operations and caching the count with the frame signature;
if the count reaches a threshold, building a frame at the next occurrence of the sequence of operations, wherein the frame includes a second sequence of operations;
detecting a subsequent need to execute the first sequence of operations; and
executing the second sequence of operations from the frame instead of the first sequence of operations.
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Abstract
The present subject matter relates to operation frame filtering, building, and execution. Some embodiments include identifying a frame signature, counting a number of execution occurrences of the frame signature, and building a frame of operations to execute instead of operations identified by the frame signature.
14 Citations
30 Claims
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1. A method comprising:
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identifying a first sequence of instructions operations by an execution core and caching a frame signature, wherein the frame signature is a unique identifier of the first sequence of operations;
counting occurrences of the first sequence of operations and caching the count with the frame signature;
if the count reaches a threshold, building a frame at the next occurrence of the sequence of operations, wherein the frame includes a second sequence of operations;
detecting a subsequent need to execute the first sequence of operations; and
executing the second sequence of operations from the frame instead of the first sequence of operations. - View Dependent Claims (2, 3, 4, 5, 6)
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7. The method of claim 7, wherein the second array includes two arrays, wherein
a data linkage array providing links from line ends of second operation sequence lines in a data array to a start of a next line of the second operation sequence, and the data array including the second sequence of operations stored in a plurality of lines.
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10. A processor comprising:
a pipeline including;
a frame filter that receives output from pipeline retirement logic;
a frame cache that provides a cached operation sequence to the pipeline; and
a frame builder that can receive a copy of an operation sequence sent to an execution core, optimize the copy of the operation sequence, and store the optimized copy of the operation sequence to the frame cache as the cached operation sequence, wherein the cached operation sequence is a frame. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18)
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19. A system comprising:
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a processor including a frame cache to provide an output in response to a request for an operation sequence, wherein the response is;
a cached operation sequence if the cached operation sequence is available, a command to cause a frame to be built by another processor portion and stored in the frame cache, or an indication that the frame cache does not have any information regarding the requested operation sequence; and
a graphics card operative in the system. - View Dependent Claims (20, 21, 22, 23, 24, 25, 26)
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27. A method comprising:
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generating an optimized frame as a function of a sequence of operations; and
storing the optimized frame in a frame cache, wherein subsequent occurrences of the sequence of operations are executed from the optimized frame instead of the actual sequence of operations. - View Dependent Claims (28, 29, 30)
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Specification