Power semiconductor module

• US 20070158859A1
• Filed: 07/28/2006
• Published: 07/12/2007
• Est. Priority Date: 08/01/2005
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Hierholzer, Martin
• Granted Patent: US 7,579,682 B2
• Time in Patent Office: Days
• US Class Current: 257/784
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/0603 Bonding areas having different sizes, e.g. different heights or widths
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/48139 with an intermediate bond, e.g. continuous wire daisy chain
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48472 the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
• CPC Class Codes: H01L 2224/4903 Connectors having different sizes, e.g. different diameters
• CPC Class Codes: H01L 2224/49051 Connectors having different shapes
• CPC Class Codes: H01L 2224/49109 outside the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/49111 the connectors connecting two common bonding areas, e.g. Litz or braid wires
• CPC Class Codes: H01L 2224/49113 the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
• CPC Class Codes: H01L 2224/49171 Fan-out arrangements
• CPC Class Codes: H01L 23/645 Inductive arrangements H01L23/647, H01L23/66 take precedence
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 24/73 Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 25/16 the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01028 : Nickel [Ni]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01067 : Holmium [Ho]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/13055 : Insulated gate bipolar transistor [IGBT]
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/15787 : Ceramics, e.g. crystalline carbides, nitrides or oxides
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19105 : in a side-by-side arrangement on a common die mounting substrate
• CPC Class Codes: H01L 2924/2076 : equal to or larger than 100 microns
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding

Abstract

A power semiconductor module has a ceramic substrate (9) which has on at least one side a patterned metallization (50) with a fineness of pattern of smaller than or equal to 800 μm, a first semiconductor chip (10) which has a power semiconductor component and which is arranged on the patterned metallization (50), and a second semiconductor chip (30) which has drive electronics for driving the first semiconductor chip (10) and which is arranged on the patterned metallization (50). Furthermore, at least one thin-wire bond (2, 3) with a bonding-wire diameter (d2, d3) of smaller than or equal to 75 μm is provided which is formed between the patterned metallization (50) and the second semiconductor chip (30).

Claims

1. A power semiconductor module comprising:

a ceramic substrate which has on at least one side a patterned metallization with a fineness of pattern of smaller than or equal to 800 μ

m,

a first semiconductor chip which comprises a power semiconductor component and which is arranged on the patterned metallization,

a second semiconductor chip which comprises drive electronics for driving the first semiconductor chip and which is arranged on the patterned metallization, and

at least one thin-wire bond with a bonding-wire diameter of smaller than or equal to 75 μ

m, which is formed between the patterned metallization and the second semiconductor chip.

2. A power semiconductor module according to claim 1, wherein at least one ceramic capacitor is arranged on the patterned metallization.

3. A power semiconductor module according to claim 1, wherein the at least one thin-wire bond has a bonding-wire diameter of smaller than or equal to 50 μ

m.

4. A power semiconductor module according to claim 1, wherein the patterned metallization has a nickel layer.

5. A power semiconductor module according to claim 1, wherein the patterned metallization has a gold layer.

6. A power semiconductor module according to claim 1, wherein the surface of the patterned metallization has a maximum peak-valley depth of less than or equal to 10 μ

m.

7. A power semiconductor module according to claim 1, wherein the surface of the patterned metallization has a mean peak-valley depth of less than or equal to 7 μ

m.

8. A power semiconductor module according to claim 1, wherein the first semiconductor chip has a gate terminal which is connected to an output of the second semiconductor chip via a coreless transformer.

9. A power semiconductor module according to claim 8, wherein a first driver chip is arranged between the output of the second semiconductor chip and the gate terminal.

10. A power semiconductor module according to claim 8, wherein a second driver chip is arranged between the output of the second semiconductor chip and/or an output of the first driver chip and the gate terminal.

11. A power semiconductor module according to claim 10, wherein the first semiconductor chip represents a controllable power switch of a lower branch of a half bridge and in which the second driver chip is arranged on a section of the patterned metallization which is electrically conductively connected to a load terminal, provided for connecting a negative supply voltage of the half bridge, of the first semiconductor chip.

12. A power semiconductor module according to claim 10, wherein the first semiconductor chip represents a controllable power switch of an upper branch of a half bridge and in which the second driver chip is arranged on a section of the patterned metallization which is electrically conductively connected to a load terminal, provided as load terminal of the half bridge of the first semiconductor chip.

13. A power semiconductor module according to claim 10, wherein a coreless transformer is arranged between the output of the second semiconductor chip and/or the gate terminal.

14. A power semiconductor module according to claim 12, wherein the coreless transformer is arranged on the second semiconductor chip.

15. A power semiconductor module according to claim 13, wherein a bond, the bond length of which is smaller than or equal to 3 mm, is formed between the coreless transformer and the first driver chip.

16. A power semiconductor module according to claim 15, wherein the length of all bonds formed between the coreless transformer and the first driver chip have bond lengths of smaller than or equal to 3 mm.

17. A power semiconductor module according to claim 1, comprising a third semiconductor chip which comprises a power semiconductor component and which is arranged on the patterned metallization, wherein the load current paths of the power semiconductor components of the first semiconductor chip and of the third semiconductor chip are connected in series to form a half bridge, and wherein the first semiconductor chip is allocated to the top branch of the half bridge and the third semiconductor chip is allocated to the bottom branch of the half bridge.

18. A power semiconductor module according to claim 1, wherein the second semiconductor chip is constructed as silicon on insulator chip.

19. A power semiconductor module according to claim 18, wherein the second semiconductor chip is arranged on a section of the patterned metallization, the section being spaced apart from the other sections of the patterned metallization.

20. A power semiconductor module according to claim 18, wherein the first semiconductor chip represents a controllable power switch of a lower branch of a half bridge, and in which the second semiconductor chip is arranged on a section of the patterned metallization, the section being electrically conductively connected to a load terminal, provided for connecting a negative supply voltage of the half bridge, of the first semiconductor chip.

21. A power semiconductor module according to claim 1, comprising a bootstrap diode which is arranged on the patterned metallization.

22. A power semiconductor module according to claim 1, comprising at least one bootstrap diode and/or other semiconductor chips which are arranged on the patterned metallization.

23. A method for producing a power semiconductor module as claimed in claim 1, the method comprising the step of soldering the first semiconductor chip comprising the power semiconductor component and the second semiconductor chip comprising the drive electronics to the patterned metallization in the same soldering step.

24. A power semiconductor module comprising:

a ceramic substrate which has on at least one side a patterned metallization with a fineness of pattern of smaller than or equal to 800 μ

m,

a first semiconductor chip which comprises a power semiconductor component and which is arranged on the patterned metallization,

a second semiconductor chip which comprises drive electronics for driving the first semiconductor chip and which is arranged on the patterned metallization, and

at least one thin-wire bond with a bonding-wire diameter of smaller than or equal to 75 μ

m, which is formed between the patterned metallization and the second semiconductor chip, wherein at least one ceramic capacitor is arranged on the patterned metallization, and wherein the at least one thin-wire bond has a bonding-wire diameter of smaller than or equal to 50 μ

m.

25. A power semiconductor module comprising:

a ceramic substrate which has on at least one side a patterned metallization with a fineness of pattern of smaller than or equal to 800 μ

m,

a first semiconductor chip which comprises a power semiconductor component and which is arranged on the patterned metallization,

a second semiconductor chip which comprises drive electronics for driving the first semiconductor chip and which is arranged on the patterned metallization, and

at least one thin-wire bond with a bonding-wire diameter of smaller than or equal to 75 μ

m, which is formed between the patterned metallization and the second semiconductor chip,

wherein the first semiconductor chip has a gate terminal which is connected to an output of the second semiconductor chip via a coreless transformer,

a first driver chip arranged between the output of the second semiconductor chip and the gate terminal, and

a second driver chip arranged between the output of the second semiconductor chip and/or an output of the first driver chip and the gate terminal.