METHOD OF TESTING A MULTI-PROCESSOR UNIT MICROPROCESSOR

• US 20070162446A1
• Filed: 01/12/2006
• Published: 07/12/2007
• Est. Priority Date: 01/12/2006
• Status: Abandoned Application

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Rohrer, Norman, Wu, Jin, Garris, James, Tanona, William, Appenzeller, David, Theberge, Mario, Longenbach, Kort, Ogilvie, Bruce, Clougherty, Frances, Percy, Dean
• Application Number:
  US11/275,533
• Publication Number:
  US 20070162446A1
  US 20060089930A1 (withdrawn)
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 11/2236 to test CPU or processors

Abstract

A method of testing a multi-processor unit microprocessor. The method includes: (a) selecting and testing, with a selected parameter set of a group of parameter sets, a processor unit of a microprocessor having two or more processor units; (b) comparing the operation of the selected processor unit to a selected specification of a set of operational specifications of the microprocessor; (c) if the testing indicates that the operation of the selected processor unit does not meet the selected specification, repeating (a) and (b) with a different parameter set of the group of parameter sets until either the selected processor unit meets the selected specification or all parameter sets of the group of parameter sets have been selected; and (d) if the operation of the selected processor unit does meet the selected specification, repeating (a), (b) and (c) until all processor units have been selected.

Claims

1. A method, comprising:

(a) selecting and testing, with a selected parameter set of a group of parameter sets, a processor unit of a microprocessor having two or more processor units;

(b) comparing the operation of said selected processor unit to a selected specification of a set of operational specifications of said microprocessor;

(c) if said testing indicates that the operation of said selected processor unit does not meet said selected specification, repeating (a) and (b) with a different parameter set of said group of parameter sets until either said selected processor unit meets said selected specification or all parameter sets of said group of parameter sets have been selected; and

(d) if said testing indicates that the operation of said selected processor unit does meet said selected specification, repeating (a), (b) and (c) until all processor units of said two or more processor units of said microprocessor have been selected.

2. The method of claim 1, further including:

(e) if all of said processor units of said two or more processor units of said microprocessor meet said specification, assigning an identifier to said microprocessor, said identifier indicating which parameter set of said group of parameter sets resulted in each processor unit of said two or more processor units of said microprocessor meeting said specification.

3. The method of claim 1, further including:

(e) if all of said processor units of said two or more processor units of said microprocessor meet said specification, assigning an identifier to said microprocessor, said identifier indicating which parameter set of said group of parameter sets resulted in each processor unit of said two or more processor units of said microprocessor meeting said specification; and

(f) blowing fuses of a fuse bank of said microprocessor in order to encode said identifier into said microprocessor.

4. The method of claim 1, further including:

(e) selecting a different specification of said set of operational specifications and repeating (a), (b), (c) and (d) until all processor units of said two or more processor units of said microprocessor have been selected.

5. The method of claim 4, further including:

(f) if all of said processor units of said two or more processor units of said microprocessor meet said specification, assigning an identifier to said microprocessor, said identifier indicating which parameter set of said group of parameter sets resulted in each processor unit of said two or more processor units of said microprocessor meeting said specification.

6. The method of claim 4, further including:

(f) if all of said processor units of said two or more processor units of said microprocessor meet said specification, assigning an identifier to said microprocessor, said identifier indicating which parameter set of said group of parameter sets resulted in each processor unit of said two or more processor units of said microprocessor meeting said specification; and

(g) blowing fuses of a fuse bank of said microprocessor in order to encode said identifier into said microprocessor.

7. The method of claim 1, wherein said parameter sets include parameters selected from the group consisting of operating voltages of said two or more processor units, operating frequencies of said two or more processor units, operating temperatures of said two or more processor unit, power consumptions of said two or more processor units and combinations thereof.

8. The method of claim 1, wherein said specification sets include specifications selected from the group consisting of specified operating voltage ranges of said two or more processor units, specified operating frequency ranges of said two or more processor units, specified operating temperature ranges of said two or more processor units, specified power consumption ranges of said two or more processor units and combinations thereof.

9. The method of claim 1, wherein each processor unit is a voltage island and further including independently assigning each processor unit an operating voltage.

10. The method of claim 9, wherein each operating voltage of each processor unit is selected to match power consumption, operating temperature, operating frequency or combinations thereof of each processor unit to one another.

11. A computer program product, comprising a computer usable medium having a computer readable program code embodied therein, said computer readable program code comprising an algorithm adapted to implement a method for testing and sorting a microprocessor having two or more processor units, said method comprising the steps of:

(a) selecting and testing, with a selected parameter set of a group of parameter sets, a processor unit of a microprocessor having two or more processor units;

(b) comparing the operation of said selected processor unit to a selected specification of a set of operational specifications of said microprocessor;

(c) if said testing indicates that the operation of said selected processor unit does not meet said selected specification, repeating (a) and (b) with a different parameter set of said group of parameter sets until either said selected processor unit meets said selected specification or all parameter sets of said group of parameter sets have been selected; and

(d) if said operation of said selected processor unit does meet said selected specification, repeating (a), (b) and (c) until all processor units of said two or more processor units of said microprocessor have been selected.

12. The computer program product of claim 11, the method further including the step of:

(e) if all of said processor units of said two or more processor units of said microprocessor meet said specification, assigning an identifier to said microprocessor, said identifier indicating which parameter set of said group of parameter sets resulted in each processor unit of said two or more processor units of said microprocessor meeting said specification.

13. The computer program product of claim 11, the method further including the step of:

(e) selecting a different specification of said set of operational specifications and repeating (a), (b), (c) and (d) until all processor units of said two or more processor units of said microprocessor have been selected.

14. The computer program product of claim 13, the method further including the step of:

(f) if all of said processor units of said two or more processor units of said microprocessor meet said specification, assigning an identifier to said microprocessor, said identifier indicating which parameter set of said group of parameter sets resulted in each processor unit of said two or more processor units of said microprocessor meeting said specification.

15. The computer program product of claim 11, wherein said parameter sets include parameters selected from the group consisting of operating voltages of said two or more processor units, operating frequencies of said two or more processor units, operating temperatures of said two or more processor units, power consumptions of said two or more processor units and combinations thereof.

16. The computer program product of claim 11, wherein said specification sets include specifications selected from the group consisting of specified operating voltage ranges of said two or more processor units, specified operating frequency ranges of said two or more processor units, specified operating temperature ranges of said two or more processor units, specified power consumption ranges of said two or more processor units and combinations thereof.

17. The computer program product of claim 11, wherein each processor unit is a voltage island and the method further including independently assigning each processor unit an operating voltage.

18. The computer program product of claim 17, further including the method step of selecting each operating voltage of each processor unit to match power consumptions of each processor unit to one another, operating temperatures of each processor unit to one another, operating frequencies of each processor unit to one another or combinations thereof.

19. A microprocessor, comprising:

two or more processor units, each processor unit comprising a voltage island; and

a fuse bank in said microprocessor, said fuse bank encoding, independently for each processor unit of said two or more processor units, at least one operating parameter for each of said processor units of said two or more processor units.

20. The microprocessor of claim 19, wherein said at least one operating parameter is an a external power supply voltage level to be electrically connected to a power grid of each of said processor units.