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WIRELESS RADIO FREQUENCY TECHNIQUE DESIGN AND METHOD FOR TESTING OF INTEGRATED CIRCUITS AND WAFERS

  • US 20070162801A1
  • Filed: 02/26/2007
  • Published: 07/12/2007
  • Est. Priority Date: 05/15/2000
  • Status: Active Grant
First Claim
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1. Apparatus for testing an integrated circuit on a wafer, comprising:

  • a) a test circuit formed on the wafer with the integrated circuit, the test circuit comprising;

    i) configurable circuitry including a plurality of selectable sub-circuits;

    ii) a control circuit configured to selectively enable at least one of the sub-circuits, and b) a test unit separate from the wafer, the test unit linked to the test circuit to transmit a signal to activate the test circuit, wherein the test circuit, when activated by the test unit, is configured to conduct a separate test of the integrated circuit for each sub-circuit selected by the control circuit and generate a test result signal.

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