INTEGRATED MEMS PACKAGE

• US 20070164378A1
• Filed: 01/13/2006
• Published: 07/19/2007
• Est. Priority Date: 01/13/2006
• Status: Abandoned Application

• Current Assignee: Honeywell International Inc.
• Original Assignee: Honeywell International Inc.
• Inventors: MacGugan, Douglas
• Application Number:
  US11/306,888
• Publication Number:
  US 20070164378A1
• Time in Patent Office: Days
• US Class Current: 257/416
• CPC Class Codes: B81B 2201/0235 Accelerometers
• CPC Class Codes: B81B 2207/012 the micromechanical device and the control or processing electronics being separate parts in the same package
• CPC Class Codes: B81C 1/0023 Packaging together an electronic processing unit die and a micromechanical structure die MEMS packages B81B7/0032; MEMS packaging processes B81C1/00261
• CPC Class Codes: G01C 19/56 Turn-sensitive devices using vibrating masses, e.g. vibratory angular rate sensors based on Coriolis forces
• CPC Class Codes: G01P 1/023 for acceleration measuring devices
• CPC Class Codes: G01P 15/0802 Details
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

Systems and methods of fabricating an integrated Micro-Electro-Mechanical Systems (MEMS) package. The MEMS package includes a substrate that has a substantially planar first surface including a cavity configured to receive a MEMS die. A substantially planar second surface is parallel to and spaced apart from the first surface. The second surface is configured to receive a flip chip. The MEMS die is inserted into the cavity. The flip chip is affixed to the substrate to establish operative connection between the MEMS die and the flip chip through traces in the substrate.

Claims

1. A substrate as a component of an integrated MEMS package, the substrate comprising:

a substantially planar first surface, the first surface defining a cavity configured to receive a MEMS die;

a substantially planar second surface parallel to and spaced apart from the first surface, the second surface configured to receive a flip chip; and

a plurality of conductive traces configured to conduct electrons, in the presence of the MEMS die and flip chip, from the MEMS die to the flip chip in operative connection.

2. The substrate of claim 1, wherein the second surface defines at least one first relief shelf, the first relief shelf configured to receive at least one of a capacitor, inductor, or resistor.

3. The substrate of claim 2, wherein the second surface defines at least one second relief shelf, the second relief shelf configured to receive at least one integrated circuit.

4. The substrate of claim 1, further comprising:

at least one contact in electrically conductive connection with at least one of the plurality of traces, the contact being configured to form a further electrically conductive connection between the at least one of the plurality of traces and a circuit in electrical connection with the contact.

5. The substrate of claim 4, wherein the contact is situated on the first surface.

6. The substrate of claim 4, wherein the contact includes a solder ball.

7. The substrate of claim 4, wherein the contact includes a contact formed by wire bonding.

8. The substrate of claim 4, wherein the contact includes a plurality of contacts and wherein the plurality of contacts are configured to form a grid array matrix.

9. The substrate of claim 1, wherein the cavity includes a cavity floor, the cavity floor being substantially parallel to the first surface.

10. The substrate of claim 9, wherein the cavity floor is metalized.

11. The substrate of claim 1, wherein cavity is hermetically sealed to define a chamber configured to contain the MEMS die.

12. The substrate of claim 1, further comprising a lid wherein the hermetic sealing includes brazing the lid to seal an opening of the cavity.

13. A method of fabricating an integrated MEMS package, the method comprising:

providing a substrate having;

a substantially planar first surface, the first surface defining a cavity configured to receive a MEMS die;

a substantially planar second surface parallel to and spaced apart from the first surface, the second surface configured to receive a flip chip; and

a plurality of conductive traces;

inserting the MEMS die into the cavity;

affixing the flip chip to the substrate to establish operative connection between the MEMS die and the flip chip through the traces.

14. The method of claim 13, further comprising:

defining at least one first relief shelf, the first relief shelf configured to receive at least one of a capacitor, inductor, or resistor.

15. The method of claim 14, further comprising:

defining at least one second relief shelf, the second relief shelf configured to receive at least one integrated circuit.

16. The method of claim 13, further comprising:

forming at least one contact in electrically conductive connection with at least one of the plurality of traces, the contact being configured to form a further electrically conductive connection between the at least one of the plurality of traces and a circuit in electrical connection with the contact.

17. The method of claim 16, wherein forming at least on contact includes forming the at least one contact such that the at least one contact is situated on the first surface.

18. The method of claim 16, wherein forming at least on contact includes forming the at least one contact such that the at least one contact includes a solder ball.

19. The method of claim 16, wherein forming at least on contact includes forming the at least one contact such that the at least a contact formed by wire bonding.

20. The method of claim 16, wherein forming at least on contact includes forming the at least one contact such that the at least one contact includes a plurality of contacts and wherein the plurality of contacts are configured to form a grid array matrix.

21. The method of claim 13, further comprising:

machining a cavity floor, the cavity floor being substantially parallel to the first surface.

22. The method of claim 21, further comprising:

metalizing the cavity floor to form a conductive floor plane.

23. The method of claim 13, further comprising:

hermetically sealing the cavity to define a chamber configured to contain the MEMS die.

24. The method of claim 23, wherein:

further comprising a lid wherein the hermetic sealing includes brazing the lid to seal an opening of the cavity.

25. An integrated MEMS package comprising:

a substrate having;

a substantially planar first surface, the first surface defining a cavity configured to receive a MEMS die;

a substantially planar second surface parallel to and spaced apart from the first surface, the second surface configured to receive a flip chip; and

a plurality of conductive traces configured to conduct electrons, in the presence of the MEMS die and flip chip, from the MEMS die to the flip chip in operative connection;

a MEMS die engaged in the cavity; and

a flip chip engaged on the second surface in operative communication with the MEMS die.

26. The integrated MEMS package of claim 25, further comprising:

at least one contact in electrically conductive connection with at least one of the plurality of traces, the contact being configured to form a further electrically conductive connection between the at least one of the plurality of traces and a circuit in electrical connection with the contact.

27. The integrated MEMS package of claim 26, wherein the contact includes a solder ball.

28. The integrated MEMS package of claim 26, wherein the contact includes a plurality of contacts and wherein the plurality of contacts are configured to form a grid array matrix.

29. The integrated MEMS package of claim 25, wherein substrate comprises a first substrate, a second substrate, and a third substrate defining a first cavity, a second cavity, and a third cavity;

the cavities configured to hold a first MEMS die, a second MEMS die, and a third MEMS die in mutually orthogonal relationship.