METHOD OF WIRE BONDING OVER ACTIVE AREA OF A SEMICONDUCTOR CIRCUIT

• US 20070164412A1
• Filed: 02/25/2007
• Published: 07/19/2007
• Est. Priority Date: 10/15/2002
• Status: Abandoned Application

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Megica Corporation (Chipbond Technology Corporation)
• Inventors: Lin, Mou-Shiung, Lee, Jin-Yuan, Chen, Ying-Chih
• Application Number:
  US11/678,597
• Publication Number:
  US 20070164412A1
• Time in Patent Office: Days
• US Class Current: 257/678
• CPC Class Codes: H01L 2224/02166 Collar structures
• CPC Class Codes: H01L 2224/023 Redistribution layers [RDL] for bonding areas
• CPC Class Codes: H01L 2224/04042 Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
• CPC Class Codes: H01L 2224/05073 Single internal layer
• CPC Class Codes: H01L 2224/05166 Titanium [Ti] as principal constituent
• CPC Class Codes: H01L 2224/05171 Chromium [Cr] as principal constituent
• CPC Class Codes: H01L 2224/05187 Ceramics, e.g. crystalline carbides, nitrides or oxides glass ceramics H01L2224/05188
• CPC Class Codes: H01L 2224/05548 Bonding area integrally formed with a redistribution layer on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/05556 in side view
• CPC Class Codes: H01L 2224/05558 conformal layer on a patterned surface
• CPC Class Codes: H01L 2224/05624 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/05644 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/4807 of bonding interfaces, e.g. interlocking features
• CPC Class Codes: H01L 2224/48453 of the interface with the bonding area
• CPC Class Codes: H01L 2224/48463 the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
• CPC Class Codes: H01L 2224/48599 Principal constituent of the connecting portion of the wire connector being Gold (Au)
• CPC Class Codes: H01L 2224/48624 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/48644 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48647 : Copper (Cu) as principal constituent
• CPC Class Codes: H01L 2224/854 : with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
• CPC Class Codes: H01L 2224/85424 : Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/85444 : Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/85447 : Copper (Cu) as principal constituent
• CPC Class Codes: H01L 24/03 : Manufacturing methods
• CPC Class Codes: H01L 24/05 : of an individual bonding area
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0001 : Technical content checked by a classifier
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01007 : Nitrogen [N]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01019 : Potassium [K]
• CPC Class Codes: H01L 2924/01022 : Titanium [Ti]
• CPC Class Codes: H01L 2924/01024 : Chromium [Cr]
• CPC Class Codes: H01L 2924/01028 : Nickel [Ni]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/04941 : TiN
• CPC Class Codes: H01L 2924/04953 : TaN
• CPC Class Codes: H01L 2924/05042 : Si3N4
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19042 : being an inductor
• CPC Class Codes: H01L 2924/19043 : being a resistor

Abstract

A method and structure are provided to enable wire bond connections over active and/or passive devices and/or low-k dielectrics, formed on an Integrated Circuit die. A semiconductor substrate having active and/or passive devices is provided, with interconnect metallization formed over the active and/or passive devices. A passivation layer formed over the interconnect metallization is provided, wherein openings are formed in the passivation layer to an upper metal layer of the interconnect metallization. Compliant metal bond pads are formed over the passivation layer, wherein the compliant metal bond pads are connected through the openings to the upper metal layer, and wherein the compliant metal bond pads are formed substantially over the active and/or passive devices. The compliant metal bond pads may be formed of a composite metal structure.

Claims

1. A circuit component, comprising:

a semiconductor substrate;

a dielectric layer having a dielectric constant of less than 3.0 over said semiconductor substrate;

a passivation layer over said dielectric layer;

a polymer layer over said passivation layer;

a metal pad on said polymer layer and over said dielectric layer; and

a wire bonded to said metal pad.

2. The circuit component of claim 1, wherein said metal pad comprises a first gold layer and a second gold layer on said first gold layer.

3. The circuit component of claim 1, wherein said metal pad comprises a gold layer.

4. The circuit component of claim 1, wherein said metal pad comprises a titanium-containing layer, and a gold layer on said titanium-containing layer.

5. The circuit component of claim 1, wherein said metal pad comprises a gold layer having a thickness of greater than 1 m.

6. The circuit component of claim 1, wherein said metal pad comprises a first copper layer and a second copper layer on said first copper layer.

7. The circuit component of claim 1, wherein said metal pad comprises a copper layer, a nickel layer on said copper layer, and a gold layer on said nickel layer.

8. The circuit component of claim 1, wherein said metal pad comprises a copper layer with a thickness of greater than 1 m.

9. The circuit component of claim 1, wherein said metal pad comprises a copper layer, and a gold layer over said copper layer.

10. The circuit component of claim 1, wherein said metal pad comprises a copper layer.

11. The circuit component of claim 1, wherein said polymer layer comprises polyimide.

12. The circuit component of claim 1, wherein said polymer layer comprises benzocyclobutene (BCB).

13. The circuit component of claim 1, wherein said passivation layer comprises silicon nitride.

14. The circuit component of claim 1, wherein said passivation layer comprises nitride.

15. The circuit component of claim 1, wherein said passivation layer comprises silicon oxide and silicon nitride.

16. A circuit component, comprising:

a semiconductor substrate;

a dielectric layer having a dielectric constant of less than 3.0 over said semiconductor substrate;

a first metal pad over said dielectric layer;

a passivation layer over said dielectric layer, an opening in said passivation layer exposing said first metal pad;

a second metal pad over said dielectric layer, wherein said second metal pad is connected to said first metal pad through said opening, and wherein said second metal pad comprises a first gold layer; and

a wire bonded to said second metal pad.

17. The circuit component of claim 16, wherein said second metal pad further comprises a second gold layer under said first gold layer.

18. The circuit component of claim 16, wherein said second metal pad further comprises a titanium-containing layer under said first gold layer.

19. The circuit component of claim 16, wherein said first gold layer has a thickness of greater than 1 m.

20. The circuit component of claim 16, wherein said second metal pad further comprises a copper layer under said first gold layer.

21. The circuit component of claim 16, wherein said second metal pad further comprises a copper layer, and a nickel layer on said copper layer, wherein said first gold layer is on said nickel layer.

22. The circuit component of claim 16, wherein said second metal pad further comprises a copper layer with a thickness of greater than 1 m under said first gold layer.

23. The circuit component of claim 16, wherein said passivation layer comprises silicon nitride.

24. The circuit component of claim 16, wherein said passivation layer comprises nitride.

25. The circuit component of claim 16, wherein said passivation layer comprises silicon oxide and silicon nitride.

26. The circuit component of claim 16, wherein said second metal pad is over said first metal pad.

27. A circuit component, comprising:

a semiconductor substrate;

a dielectric layer having a dielectric constant of less than 3.0 over said semiconductor substrate;

a passivation layer over said dielectric layer;

a metal pad over said passivation layer, wherein said metal pad comprises a first gold layer; and

a wire bonded to said metal pad.

28. The circuit component of claim 27, wherein said metal pad further comprises a second gold layer under said first gold layer.

29. The circuit component of claim 27, wherein said metal pad further comprises a titanium-containing layer under said first gold layer.

30. The circuit component of claim 27, wherein said first gold layer has a thickness of greater than 1 m.

31. The circuit component of claim 27, wherein said metal pad further comprises a copper layer under said first gold layer.

32. The circuit component of claim 27, wherein said metal pad further comprises a copper layer, and a nickel layer on said copper layer, wherein said first gold layer is on said nickel layer.

33. The circuit component of claim 27, wherein said second metal pad further comprises a copper layer with a thickness of greater than 1 m under said first gold layer.

34. The circuit component of claim 27, wherein said passivation layer comprises silicon nitride.

35. The circuit component of claim 27, wherein said passivation layer comprises a silicon oxide and a silicon nitride over said silicon oxide.