Storage virtualization subsystem and system with host-side redundancy via SAS connectivity

• US 20070165660A1
• Filed: 11/22/2006
• Published: 07/19/2007
• Est. Priority Date: 11/23/2005
• Status: Active Grant

• Current Assignee: Infortrend Technology Incorporated (Infortrend Corporation)
• Original Assignee: Infortrend Technology Incorporated (Infortrend Corporation)
• Inventors: Pang, Ching-Te, Fang, Ching-Hua
• Granted Patent: US 8,352,653 B2
• Time in Patent Office: Days
• US Class Current: 370/410
• CPC Class Codes: G06F 11/201 between storage system components
• CPC Class Codes: G06F 11/2092 Techniques of failing over between control units
• CPC Class Codes: H04L 67/1097 for distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS]
• CPC Class Codes: H04L 69/40 for recovering from a failure of a protocol instance or entity, e.g. service redundancy protocols, protocol state redundancy or protocol service redirection management of faults, events, alarms or notifications in data switching networks H04L41/06

Abstract

This invention discloses a storage visualization subsystem and system with host-side redundancy via SAS connectivity. The I/O interconnect interface between the storage visualization controller and the host is a serial-attached SCSI (SAS) interface. At least one SAS expander is inserted on the I/O interconnect path of the host side to provide the function of device expansion. Or, a built-in virtual SAS expander is disposed inside the storage virtualization controller to provide multiple virtual IDs for each SAS port. When one controller in the storage virtualization controller pair malfunctions or fails, the invention provides solutions in accord with different embodiments so that the surviving controller can inherit the ID of the failed one. Thus, the host can keep functioning normally as it is not aware of any change in the device status.

Claims

1. A storage virtualization subsystem with host-side redundancy via serial-attached SCSI (SAS) connectivity connected to at least one initiator, the subsystem comprising:

a storage virtualization controller (SVC) pair including a first SVC and a second SVC for executing an I/O operation in response to an I/O request sent from the initiator;

at least one SAS expander disposed on the path of an I/O device interconnect between the SVC pair and the initiator for providing the device expansion function; and

a physical storage device (PSD) array comprising at least one PSD for providing storing space to the subsystem;

wherein the signal interconnect interface among the SVC pair, the SAS expander, and the initiator is a serial-attached SCSI (SAS) interface.

2. The subsystem of claim 1, wherein the PSD in the PSD array is coupled to the SVC pair via a peer-to-peer serial signal interconnect.

3. The subsystem of claim 2, wherein the peer-to-peer serial signal interconnect is a SATA interface and the PSD is a SATA disk drive.

4. The subsystem of claim 3 further comprising a multiplexer (MUX) coupled between the SATA disk drive and the SVC pair for processing the I/O signal transmitted between the SATA disk drive and the SVC pair.

5. The subsystem of claim 2, wherein the peer-to-peer serial signal interconnect is a SAS interface.

6. The subsystem of claim 1, wherein the interconnect interface of the at least one PSD in the PSD array is a fibre channel or SCSI interface.

7. The subsystem of claim 1, wherein each the SVC in the SVC pair further comprises:

a central processing circuit (CPC) for executing the I/O operation in response to the I/O request sent from the initiator;

an RCC interconnect controller coupled between the CPC and the other SVC of the SVC pair;

a host-side I/O device interconnect controller coupled to the CPC and to the initiator via the expander as an interface between the SVC and the initiator;

a drive-side I/O device interconnect controller coupled between the CPC and the PSD array as an interface between the SVC and the PSD array; and

a memory coupled to the CPC as a buffer for buffering data transmitted between the initiator and the PSD array via the CPC.

8. The subsystem of claim 7, wherein the host-side I/O device interconnect controller further comprises at least one SAS host-side I/O device port.

9. The subsystem of claim 1, wherein each the SVC in the SVC pair further comprises:

a central processing circuit (CPC) for executing the I/O operation in response to the I/O request sent from the initiator;

at least one I/O device interconnect controller coupled to the CPC;

at least one host-side I/O device port disposed in one of the at least one I/O device interconnect controller for coupling to the initiator; and

at least one drive-side I/O device port disposed in one of the at least one I/O device interconnect controller for coupling to the PSD via a peer-to-peer serial signal interconnect.

10. The subsystem of claim 9, wherein one of the at least one host-side I/O device port and one of the at least one drive-side I/O device port are disposed in the same I/O device interconnect controller.

11. The subsystem of claim 9, wherein one of the at least one host-side I/O device port and one of the at least one drive-side I/O device port are disposed in different the I/O device interconnect controllers.

12. The subsystem of claim 9, wherein the at least one host-side I/O device port is a SAS port.

13. The subsystem of claim 8 or 9, wherein each of the first SVC and the second SVC has two of the host-side I/O device ports.

14. The subsystem of claim 8 or 9, wherein each of the at least one host-side I/O device port consists of four PHYs, forming a 4-PHY wide port.

15. The subsystem of claim 14, wherein when one SVC of the SVC pair malfunctions or fails, each of the 4-PHY wide ports of the surviving SVC is divided into two 2-PHY wide ports, and all of the 2-PHY wide ports take over the IDs of all of the 4-PHY wide ports when no SVC failure happens.

16. The subsystem of claim 14, wherein the address of the first 4-PHY wide port of the first SVC is equal to a base address and the address of the first 4-PHY wide port of the second SVC is equal to the base address added by an appropriate value.

17. The subsystem of claim 16, wherein the appropriate value is 1.

18. The subsystem of claim 15, wherein an initialization procedure is started to assign the addresses of all the new 2-PHY wide ports equal to the addresses of all the 4-PHY wide ports before the device fails.

19. The subsystem of claim 18, wherein the initialization procedure is started by a kernel.

20. The subsystem of claim 19, wherein the kernel is stored in a ROM of the CPC.

21. The subsystem of claim 16, wherein the base address is stored in a backplane which has an electrical connection to each of the SVCs.

22. The subsystem of claim 1, wherein the number of the at least one expander is 1.

23. The subsystem of claim 22, wherein the expander is divided into a first zone and a second zone by a zoning technique.

24. The subsystem of claim 1, wherein the number of the at least one expander is 2.

25. The subsystem of claim 1, wherein the first SVC of the SVC pair is set in an active mode to process the I/O request sent from the initiator and the second SVC is set in a standby mode as a backup of the first SVC.

26. The subsystem of claim 8 or 9, wherein each the SVC in the SVC pair comprises an even multiple of the host-side I/O device ports, half of which being set in a active mode and the other half of which being set in a standby mode as a backup.

27. A storage virtualization system with host-side redundancy via SAS connectivity, comprising:

at least one initiator for sending at least one I/O request; and

at least one redundant storage virtualization subsystem using an SAS signal interconnect interface to couple to the initiator, each of the at least one redundant storage virtualization subsystem further comprising;

a storage virtualization controller (SVC) pair including a first SVC and a second SVC for executing an I/O operation in response to an I/O request sent from the at least one initiator;

at least one SAS expander disposed on the path of an I/O device interconnect between the SVC pair and the initiator for providing the device expansion function; and

a physical storage device (PSD) array comprising at least one PSD for providing storing space to the subsystem.

28. The system of claim 27 further comprising a plurality of the redundant storage virtualization subsystems, which are adjacently cascaded.

29. The system of claim 28, wherein one of the at least one SAS expander of the first redundant storage virtualization subsystem and one of the at least one SAS expander of the last redundant storage virtualization subsystem are connected and the corresponding connection between the at least one SAS expanders of the first and the second of the plurality of redundant storage virtualization subsystems is removed.

30. The system of claim 27 further comprising a plurality of the redundant storage virtualization subsystems, wherein one of which is connected to all the others.

31. The system of claim 28, 29, or 30, wherein the cascading or connection refers to the connection using ports of the SAS expanders of the redundant storage virtualization subsystems.

32. The system of claim 27, further comprising a plurality of the initiators connected to the at least one redundant storage virtualization subsystem.

33. The system of claim 27, wherein the initiator supports a multi-path I/O technology.

34. A storage virtualization subsystem with host-side redundancy via SAS connectivity connected to at least one initiator, the subsystem comprising:

a storage virtualization controller (SVC) pair, including a first SVC and a second SVC for executing an I/O operation in response to an I/O request sent from the initiator, each of the first SVC and the second SVC having a built-in virtual SAS expander for providing each physical port with multiple virtual IDs;

a switch component disposed on the path of an I/O device interconnect between the SVC pair and the initiator; and

a physical storage device (PSD) array, including at least one PSD for providing the storage virtualization subsystem with storing space;

wherein the signal interconnect interface between the SVC pair and the initiator is an SAS interface.

35. The subsystem of claim 34, wherein the virtual SAS expander is a functional module achieved by software and hardware.

36. The subsystem of claim 34, wherein the virtual SAS expander is a program module recorded in a ROM of each the SVC in the SVC pair.

37. The subsystem of claim 34, wherein the virtual SAS expander further comprises a table for recording the related information of the multiple virtual IDs.

38. The subsystem of claim 37, wherein the related information includes the connection state (connected or disconnected) of each of the multiple virtual IDs and/or the corresponding PHY address.

39. The subsystem of claim 37, wherein when one of the SVCs malfunctions or fails, a surviving SVC starts an initialization procedure.

40. The subsystem of claim 39, wherein the initialization procedure changes the related information of the multiple virtual IDs recorded in the table.

41. The subsystem of claim 39, wherein the initialization procedure is started by a kernel.

42. The subsystem of claim 41, wherein the kernel is stored in a ROM disposed in the first SVC or the second SVC.

43. The subsystem of claim 34, wherein the switch component is an SAS expander.

44. The subsystem of claim 34, wherein the at least one PSD in the PSD array is coupled to the SVC pair via a peer-to-peer serial signal interconnect.

45. The subsystem of claim 44, wherein the peer-to-peer serial signal interconnect is a SATA interface and the PSD is a SATA disk drive.

46. The subsystem of claim 45 further comprising a multiplexer (MUX) coupled between the SATA disk drive and the SVC pair for processing the I/O signal transmitted between the SATA disk drive and the SVC pair.

47. The subsystem of claim 44, wherein the peer-to-peer serial signal interconnct is a SAS interconnect interface.

48. The subsystem of claim 34, wherein the interconnect interface of the at least one PSD in the PSD array is a fibre channel or SCSI interface.

49. The subsystem of claim 34, wherein each the SVC in the SVC pair further comprising:

a CPC for executing the I/O operation in response to the I/O request sent from the initiator;

an RCC interconnect controller coupled between the CPC and the other SVC in the SVC pair;

a host-side I/O device interconnect controller coupled to the CPC and to the initiator via the expander as an interface between the SVC and the initiator;

a drive-side I/O device interconnect controller coupled between the CPC and the PSD array as an interface between the SVC and the PSD array; and

a memory coupled to the CPC as a buffer for buffering data transmitted between the initiator and the PSD via the CPC.

50. The subsystem of claim 49, wherein the host-side I/O device interconnect controller further comprises at least one SAS host-side I/O device port.

51. The subsystem of claim 34, wherein each the SVC in the SVC pair further comprising:

a central processing circuit (CPC) for executing the I/O operation in response to the I/O request sent from the initiator;

at least one I/O device interconnect controller coupled to the CPC;

at least one host-side I/O device port disposed in one of the at least one I/O device interconnect controller for coupling to the initiator; and

at least one drive-side I/O device port disposed in one of the at least one I/O device interconnect controller for coupling to the PSD via a peer-to-peer serial signal interconnect.

52. The subsystem of claim 51, wherein one of the at least one host-side I/O device port and one of the at least one drive-side I/O device port are disposed in the same I/O device interconnect controller.

53. The subsystem of claim 51, wherein one of the at least one host-side I/O device port and one of the at least one drive-side I/O device port are disposed in different the I/O device interconnect controllers.

54. The subsystem of claim 51, wherein each of the at least one host-side I/O device port is a SAS port.

55. The subsystem of claim 50 or 51, wherein each of the at least one host-side I/O device port consists of four PHYs, forming a 4-PHY wide port.