Reconfigurable system with corruption detection and recovery

• US 20070168718A1
• Filed: 11/08/2005
• Published: 07/19/2007
• Est. Priority Date: 11/08/2005
• Status: Active Grant

• Current Assignee: META Systems (Siemens AG)
• Original Assignee: M2000 S.A. (Abound Logic, Inc.)
• Inventors: Reblewski, Frederic, Lepape, Olivier
• Granted Patent: US 7,568,136 B2
• Time in Patent Office: Days
• US Class Current: 714/15
• CPC Class Codes: G06F 11/1438 Restarting or rejuvenating
• CPC Class Codes: H03K 19/1776 for memories
• CPC Class Codes: H03K 19/17764 for reliability

Abstract

A system and method for detecting corrupted configuration data stored in a configuration memory of a reconfigurable circuit are described herein.

Claims

1. A reconfigurable system comprising:

a reconfigurable circuit including a plurality of reconfiguration functions and reconfigurable interconnects coupled to the reconfiguration functions, and a configuration memory coupled to the reconfiguration functions and interconnects to store configuration data to configure the reconfiguration functions and interconnects; and

a recovery module coupled to the reconfigurable circuit and adapted to access the configuration memory to retrieve the configuration data stored in the configuration memory, analyze the retrieved configuration data to determine whether the configuration data has been corrupted, and restore the configuration data to their uncorrupted state.

2. The reconfigurable system of claim 1, wherein the configuration memory is structured as a looped back shift register.

3. The reconfigurable system of claim 1, wherein the configuration memory is structured either a shadow shift register or a static random access memory.

4. The reconfigurable system of claim 1, wherein the system further comprises nonvolatile storage to store the configuration data provided to and stored in the configuration memory of the reconfigurable circuit.

5. The reconfigurable system of claim 4, wherein the recovery module is adapted to perform said analysis to make said determination by performing a bit-by-bit comparison of the configuration data retrieved from the configuration memory of reconfigurable circuit with the configuration data stored in the non-volatile storage.

6. The reconfigurable system of claim 1, wherein the recovery module is adapted to perform said analysis to make said determination by computing a current configuration signature based on the configuration data retrieved from the configuration memory of reconfigurable circuit and storing a reference configuration signature and comparing the computed current and reference configuration signatures.

7. The reconfigurable system of claim 6 where the recovery module is adapted to receive the reference signature at the same time the configuration memory is configured.

8. The reconfigurable system of claim 6 where the recovery module is adapted to compute the reference signature based on the configuration data that are initially loaded to the configuration memory.

9. The reconfigurable system of claim 1, wherein the recovery module is adapted to perform said analysis and conditional restoration of the configuration data, either periodically or continuously.

10. The reconfigurable system of claim 1, wherein the recovery module is further adapted to notify an application implemented using the reconfigurable circuit after a beginning of said analysis, after determining that the configuration data is uncorrupted, and/or after restoring the configuration data, to their uncorrupted state.

11. The reconfigurable system of claim 10, wherein the recovery module is further adapted to notify the application that a configuration data analysis starts.

12. The reconfiguration system of claim 10, wherein the recovery module is further adapted to notify the application of configuration data errors detected.

13. The reconfigurable system of claim 10, wherein the recovery module is adapted to wait for the application to stop before restoring the configuration data to their uncorrupted state.

14. The reconfigurable system of claim 10, wherein the application includes an application memory configured to be protected by one or more parity bits that cause the application to restart on an occurrence of a parity error.

15. The reconfigurable system of claim 10, wherein the application includes an application register having one or more register bits, with at least one of the register bits having a redundant copy of the register bit, and logic coupled to the register bit and the redundant copy to cause the application to restart on a mismatch of the register bit and the redundant copy.

16. A method comprising:

accessing a configuration memory of a reconfigurable circuit to retrieve configuration data stored in the configuration memory to configure a plurality of reconfiguration functions and interconnects of the reconfigurable circuit;

analyzing the retrieved configuration data to determine whether the configuration data has been corrupted; and

restoring the configuration data to their uncorrupted state on determining the configuration data has been corrupted.

17. The method of claim 16, wherein the configuration memory is structured as a looped back shift register, and the accessing and retrieving are performed by stopping an application implemented using the reconfigurable circuit, shifting the configuration data until each configuration bit comes back to its original place, and restarting the application.

18. The method of claim 16, wherein the configuration memory is structured either as a shadow shift register or a static random access memory, and the accessing and retrieving are performed in parallel with an application running, the application implemented using the reconfigurable circuit.

19. The method of claim 16, wherein said analyzing comprises performing a bit by bit comparison of the configuration data retrieved from the configuration memory of reconfigurable circuit with the configuration data stored in the non-volatile storage.

20. The method of claim 16, wherein the method further comprises computing a current signature while the configuration memory is accessed and retrieved and comparing it with a previously stored signature in a dedicated memory when the circuit was initially configured.

21. The method of claim 16, wherein said analysis and conditional restoration of the configuration data, are performed either periodically or continuously.

22. The method of claim 16, wherein the method further comprising notifying an application implemented using the reconfigurable circuit after a beginning of said analysis, after determining that the configuration data is uncorrupted, and/or after restoring the configuration data to their uncorrupted state.

23. The method of claim 22, wherein the method further comprises notifying an application implemented using the reconfigurable circuit before a beginning of said analysis.

24. The method of claim 22, further comprising notifying the application of configuration data errors detected.

25. The method of claim 22, wherein said restoring comprises waiting for the application to stop before restoring the configuration data to their uncorrupted state.

26. The method of claim 22, wherein the method further comprises configuring the application to include an application memory protected by one or more parity bits that cause the application to restart on an occurrence of a parity error.

27. The method of claim 22, wherein the method further comprises configuring the application to include an application register having one or more register bits, with at least one of the register bits having a redundant copy of the register bit, and logic coupled to the register bit and the redundant copy to cause the application to restart on a mismatch of the register bit and the redundant copy.