Arrangements for an intergrated sensor

• US 20070170533A1
• Filed: 01/20/2006
• Published: 07/26/2007
• Est. Priority Date: 01/20/2006
• Status: Active Grant

• Current Assignee: Allegro Microsystems Incorporated (Sanken Electric Company Limited)
• Original Assignee: Allegro Microsystems Incorporated (Sanken Electric Company Limited)
• Inventors: Taylor, William, Doogue, Michael, Mangtani, Vijay
• Granted Patent: US 7,768,083 B2
• Time in Patent Office: Days
• US Class Current: 257/422
• CPC Class Codes: B82Y 25/00 Nanomagnetism, e.g. magnetoimpedance, anisotropic magnetoresistance, giant magnetoresistance or tunneling magnetoresistance
• CPC Class Codes: G01R 15/08 Circuits for altering the measuring range
• CPC Class Codes: G01R 15/207 Constructional details independent of the type of device used
• CPC Class Codes: G01R 33/02 Measuring direction or magnitude of magnetic fields or magnetic flux G01R33/20 takes precedence
• CPC Class Codes: G01R 33/06 using galvano-magnetic devices
• CPC Class Codes: G01R 33/07 Hall effect devices
• CPC Class Codes: G01R 33/09 Magnetoresistive devices
• CPC Class Codes: G01R 33/093 using multilayer structures, e.g. giant magnetoresistance sensors thin magnetic films H01F10/00
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 23/49541 Geometry of the lead-frame
• CPC Class Codes: H01L 25/162 the devices being mounted on two or more different substrates
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/3025 Electromagnetic shielding
• CPC Class Codes: H10N 50/10 Magnetoresistive devices
• CPC Class Codes: H10N 50/80 Constructional details
• CPC Class Codes: H10N 52/101 Semiconductor Hall-effect devices
• CPC Class Codes: H10N 52/80 Constructional details

Abstract

An integrated circuit can have a first substrate supporting a magnetic field sensing element and a second substrate supporting another magnetic field sensing element. The first and second substrates can be arranged in a variety of configurations. Another integrated circuit can have a first magnetic field sensing element and second different magnetic field sensing element disposed on surfaces thereof.

Claims

1. An integrated circuit, comprising:

a lead frame;

a first substrate having first and second opposing surfaces, wherein the first substrate is coupled to the lead frame;

a second substrate having first and second opposing surfaces, wherein the first substrate and the second substrate are coupled such that the first surface of the second substrate is proximate to the first surface of the first substrate and the second surface of the second substrate is distal from the second surface of the second substrate;

an electronic component disposed on the first surface of the first substrate; and

a magnetic field sensing element disposed on the first surface of the second substrate.

2. The integrated circuit of claim 1, where the first substrate is coupled to the lead frame such that the second surface of the first substrate is proximate to the lead frame and the first surface of the first substrate is distal from the lead frame.

3. The integrated circuit of claim 1, further including a flux concentrator disposed proximate to the magnetic field sensing element.

4. The integrated circuit of claim 1, wherein the first substrate is comprised of a selected one of Si, GaAs, InP, InSb, InGaAs, InGaAsP, SiGe, ceramic, or glass and the second substrate is comprised of a selected one of Si, GaAs, InP, InSb, InGaAs, InGaAsP, SiGe, ceramic, or glass.

5. The integrated circuit of claim 1, wherein the second substrate is coupled to the first substrate with a selected one of a solder ball, a gold bump, a eutectic or high lead solder bump, a no-lead solder bump, a gold stud bump, a polymeric conductive bump, or anisotropic conductive paste, or a conductive film. (Why would we not just claim:

The integrated circuit of claim 1, wherein the second substrate is electrically coupled to the first substrate with a conductive element. My idea is that is a bit broader and we can always fall back to the above list type of claim.)

6. The integrated circuit of claim 1, further comprising a second magnetic field sensing element disposed on the first surface of the first substrate.

7. The integrated circuit of claim 6, further including at least one flux concentrator disposed proximate to at least one of the magnetic field sensing element or the second magnetic field sensing element.

8. The integrated circuit of claim 1, wherein the lead frame further comprises a plurality of leads, wherein at least two of the plurality of leads are coupled to form a current conductor portion, wherein the current conductor portion is disposed proximate to the second substrate, and wherein the integrated circuit is responsive to a current flowing through the current conductor portion.

9. The integrated circuit of claim 1, wherein the integrated circuit is adapted to be responsive to a current passing through a wire.

10. The integrated circuit of claim 1, further comprising:

a current conductor disposed proximate to the second substrate; and

a flux concentrator shaped so that a first portion of the flux concentrator is disposed under the lead frame and a second portion of the flux concentrator is disposed above the second surface of the second substrate.

11. An integrated circuit, comprising:

a lead frame;

a first substrate having first and second opposing surfaces, wherein the first substrate is coupled to the lead frame such that the second surface of the first substrate is above the lead frame and the first surface of the first substrate is above the second surface of the first substrate;

a second substrate having first and second opposing surfaces, wherein the first substrate and the second substrate are coupled such that the second surface of the second substrate is above the first surface of the first substrate and the first surface of the second substrate is above the second surface of the second substrate;

an electronic component disposed on the first surface of the first substrate; and

a magnetic field sensing element disposed on the first surface of the second substrate.

12. The integrated circuit of claim 11, further including a flux concentrator disposed proximate to the magnetic field sensing element.

13. The integrated circuit of claim 11, wherein the first substrate is comprised of a selected one of Si, GaAs, InP, InSb, InGaAs, InGaAsP, SiGe, ceramic, or glass and the second substrate is comprised of a selected one of Si, GaAs, InP, InSb, InGaAs, InGaAsP, SiGe, ceramic, or glass.

14. The integrated circuit of claim 11, wherein the first surface of the second substrate is coupled to the first surface of the first substrate with a wire bond.

15. The integrated circuit of claim 11, further comprising a second magnetic field sensing element disposed on the first surface of the first substrate.

16. The integrated circuit of claim 15, further including at least one flux concentrator disposed proximate to at least one of the magnetic field sensing element or the second magnetic field sensing element.

17. The integrated circuit of claim 11, wherein the lead frame further comprises a plurality of leads, wherein at least two of the plurality leads are coupled to form a current conductor portion, wherein the current conductor portion is disposed proximate to the second substrate, and wherein the integrated circuit is responsive to a current flowing through the current conductor portion.

18. The integrated circuit of claim 11, wherein the integrated circuit is adapted to be responsive to a current passing through a wire.

19. The integrated circuit of claim 11, further comprising:

a current conductor disposed proximate to the second substrate; and

a flux concentrator shaped so that a first portion of the flux concentrator is disposed under the lead frame and a second portion of the flux concentrator is disposed above the first surface of the second substrate.

20. An integrated circuit, comprising:

a lead frame;

a first substrate having first and second opposing surfaces, wherein the first substrate is coupled to the lead frame such that the second surface of the first substrate is above the lead frame and the first surface of the first substrate is above the second surface of the first substrate;

a second substrate having first and second opposing surfaces, wherein the second substrate is coupled to the lead frame such that the second surface of the second substrate is above the lead frame and the first surface of the second substrate is above the second surface of the second substrate;

an electronic component disposed on the first surface of the first substrate;

a first magnetic field sensing element disposed on the first surface of the second substrate; and

a second magnetic field sensing element disposed on the first surface of the first substrate.

21. The integrated circuit of claim 20, further including a flux concentrator disposed proximate to the magnetic field sensing element.

22. The integrated circuit of claim 20, wherein the first substrate is comprised of a selected one of Si, GaAs, InP, InSb, InGaAs, InGaAsP, SiGe, ceramic, or glass and the second substrate is comprised of a selected one of Si, GaAs, InP, InSb, InGaAs, InGaAsP, SiGe, ceramic, or glass.

23. The integrated circuit of claim 20, wherein the first surface of the second substrate is coupled to the first surface of the first substrate with a wire bond.

24. The integrated circuit of claim 23, further including at least one flux concentrator disposed proximate to at least one of the magnetic field sensing element or the second magnetic field sensing element.

25. The integrated circuit of claim 20, wherein the lead frame further comprises a plurality of leads, wherein at least two of the plurality of leads are coupled to form a current conductor portion, wherein the current conductor portion is disposed proximate to the second substrate, and wherein the integrated circuit is responsive to a current flowing through the current conductor portion.

26. The integrated circuit of claim 20, wherein the integrated circuit is adapted to be responsive to a current passing through a wire.

27. The integrated circuit of claim 20, further comprising:

a current conductor disposed proximate to the second substrate; and

a flux concentrator shaped so that a first portion of the flux concentrator is disposed under the lead frame and a second portion of the flux concentrator is disposed above the first surface of the second substrate.

28. An integrated circuit, comprising:

a lead frame;

a base substrate having first and second opposing surfaces, wherein the base substrate is coupled to the lead frame such that the second surface of the base substrate is above the lead frame and the first surface of the base substrate is above the second surface of the base substrate;

a first substrate having first and second opposing surfaces, wherein the first substrate is coupled to the base substrate such that the first surface of the first substrate is above the first surface of the base substrate and the second surface of the first substrate is above the first surface of the first substrate;

a second substrate having first and second opposing surfaces, wherein the second substrate is coupled to the base substrate such that the first surface of the second substrate is above the first surface of the base substrate and the second surface of the second substrate is above the first surface of the second substrate;

an electronic component disposed on the first surface of the first substrate; and

a magnetic field sensing element disposed on the first surface of the second substrate.

29. The integrated circuit of claim 28, further including a flux concentrator disposed proximate to the magnetic field sensing element.

30. The integrated circuit of claim 28, wherein the first substrate is comprised of a selected one of Si, GaAs, InP, InSb, InGaAs, InGaAsP, SiGe, ceramic, or glass and the second substrate is comprised of a selected one of Si, GaAs, InP, InSb, InGaAs, InGaAsP, SiGe, ceramic, or glass.

31. The integrated circuit of claim 28, wherein the first surface of the second substrate is coupled to the first surface of the base substrate with a selected one of a solder ball, a gold bump, a eutectic or high lead solder bump, a no-lead solder bump, a gold stud bump, a polymeric conductive bump, an anisotropic conductive paste, or a conductive film, and the first surface of the first substrate is coupled to the first surface of the base substrate with a selected one of a solder ball, a gold bump, a eutectic or high lead solder bump, a no-lead solder bump, a gold stud bump, a polymeric conductive bump, an anisotropic conductive paste, or a conductive film.

32. The integrated circuit of claim 28, further comprising a second magnetic field sensing element disposed on the first surface of the first substrate.

33. The integrated circuit of claim 32, further including at least one flux concentrator disposed proximate to at least one of the magnetic field sensing element or the second magnetic field sensing element.

34. The integrated circuit of claim 28, wherein the lead frame further comprises a plurality of leads, wherein at least two of the plurality of leads are coupled to form a current conductor portion, wherein the current conductor portion is disposed proximate to the second substrate, and wherein the integrated circuit is responsive to a current flowing through the current conductor portion.

35. The integrated circuit of claim 28, wherein the integrated circuit is adapted to be responsive to a current passing through a wire.

36. The integrated circuit of claim 28, further comprising:

a current conductor disposed proximate to the second substrate; and

a flux concentrator shaped so that a first portion of the flux concentrator is disposed under the lead frame and a second portion of the flux concentrator is disposed above the second surface of the second substrate.

37. An integrated circuit, comprising:

a lead frame;

a base substrate having first and second opposing surfaces, wherein the base substrate is coupled to the lead frame such that the second surface of the base substrate is above the lead frame and the first surface of the base substrate is above the second surface of the base substrate;

a first substrate having first and second opposing surfaces, wherein the first substrate is coupled to the base substrate such that the second surface of the first substrate is above the first surface of the base substrate and the first surface of the first substrate is above the second surface of the first substrate;

a second substrate having first and second opposing surfaces, wherein the second substrate is coupled to the base substrate such that the second surface of the second substrate is above the first surface of the base substrate and the first surface of the second substrate is above the second surface of the second substrate;

an electronic component disposed on the first surface of the first substrate; and

a magnetic field sensing element disposed on the first surface of the second substrate.

38. The integrated circuit of claim 37, further including a flux concentrator disposed proximate to the magnetic field sensing element.

39. The integrated circuit of claim 37, wherein the first substrate is comprised of a selected one of Si, GaAs, InP, InSb, InGaAs, InGaAsP, SiGe, ceramic, or glass and the second substrate is comprised of a selected one of Si, GaAs, InP, InSb, InGaAs, InGaAsP, SiGe, ceramic, or glass.

40. The integrated circuit of claim 37, wherein the first surface of the second substrate is coupled with a wire bond to at least one of the first surface of the first substrate or the first surface of the base substrate.

41. The integrated circuit of claim 37, further comprising a second magnetic field sensing element disposed on the first surface of the first substrate.

42. The integrated circuit of claim 41, further including at least one flux concentrator disposed proximate to at least one of the magnetic field sensing element or the second magnetic field sensing element.

43. The integrated circuit of claim 37, wherein the lead frame further comprises a plurality of leads, wherein at least two of the plurality of leads are coupled to form a current conductor portion, wherein the current conductor portion is disposed proximate to the second substrate, and wherein the integrated circuit is responsive to a current flowing through the current conductor portion.

44. The integrated circuit of claim 37, wherein the integrated circuit is adapted to be responsive to a current passing through a wire.

45. The integrated circuit of claim 37, further comprising:

a current conductor disposed proximate to the second substrate; and

a flux concentrator shaped so that a first portion of the flux concentrator is disposed under the lead frame and a second portion of the flux concentrator is disposed above the first surface of the second substrate.

46. An integrated circuit, comprising:

a first magnetic field sensing element having a first sensitivity to a magnetic field;

a second magnetic field sensing element having a second different sensitivity to the magnetic field; and

a circuit coupled to the first and second magnetic field sensing elements, operable to provide the integrated circuit with a first sensitivity range and a second different sensitivity range in response to the magnetic field.

47. The integrated circuit of claim 46, wherein the first magnetic field sensing element and the second magnetic field sensing element are Hall effect elements.

48. The integrated circuit of claim 46, wherein the first magnetic field sensing element and the second magnetic field sensing element are magnetoresistance elements.

49. The integrated circuit of claim 46, wherein the first magnetic field sensing element is a Hall effect element and the second magnetic field sensing element is a magnetoresistance element.

50. The integrated circuit of claim 46, further comprising a lead frame having a plurality of leads, wherein at least two of the plurality of leads are coupled to form a current conductor portion, wherein the current conductor portion is disposed proximate to the first and second magnetic field sensing elements, and wherein the integrated circuit is responsive to a current flowing through the current conductor portion.

51. An integrated circuit, comprising:

a first substrate;

a circuit element disposed on a surface of the first substrate;

a second substrate coupled to the first substrate; and

a Hall effect element disposed on a surface of the second substrate.

52. The integrated circuit of claim 51, further comprising a Hall effect element disposed on a surface of the first substrate.

53. The integrated circuit of claim 51, further comprising a magnetoresistance element disposed on a surface of the first substrate.

54. The integrated circuit of claim 51, wherein the first substrate is comprised of a selected one of Si, GaAs, InP, InSb, InGaAs, InGaAsP, SiGe, ceramic, or glass and the second substrate is comprised of a selected one of Si, GaAs, InP, InGaAs, InSb, InGaAsP, SiGe, ceramic, or glass.

55. An integrated circuit, comprising:

a first substrate;

a circuit element disposed on a surface of the first substrate;

a Hall effect element disposed on a surface of the first substrate;

a second substrate coupled to the first substrate, and

a magnetoresistance element disposed on a surface of the second substrate.

56. The integrated circuit of claim 55, wherein the first substrate is comprised of a selected one of Si, GaAs, InP, InSb, InGaAs, InGaAsP, SiGe, ceramic, or glass and the second substrate is comprised of a selected one of Si, GaAs, InP, InSb, InGaAsP, SiGe, ceramic, or glass.

57. An integrated circuit, comprising:

a substrate;

a first magnetic field sensing element disposed on a surface of the substrate; and

a second magnetic field sensing element disposed on a surface of the substrate, wherein the second magnetic field sensing element has a different structure than the first magnetic field sensing element.

58. The integrated circuit of claim 57, wherein the first magnetic field sensing element comprises a Hall effect element and the second magnetic field sensing element comprises a magnetoresisance element.

59. The integrated circuit of claim 57, wherein the first magnetic field sensing element comprises a Hall effect element and the second magnetic field sensing element comprises a Hall effect element having a different sensitivity than the first Hall effect element.

60. The integrated circuit of claim 57, further comprising a circuit element disposed on a surface of the substrate.