Electrophoretic indication display
First Claim
1. An electrophoretic display having a pair of substrates separated by a microcapsule layer, a plurality of pixels formed at the intersections of rows of gate lines and columns of data lines on at least one of the substrates, comprising:
- at least one of said substrates being sufficiently flexible when touched to change the separation between said substrates at any of said pixels;
a plurality of sense signal lines formed parallel to the data lines; and
a sense signal processing unit connected with the sense signal lines for sensing a change in capacitance between said substrates at any of said pixels.
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Accused Products
Abstract
An electrophoretic display having a pair of substrates separated by a microcapsule layer, a plurality of pixels formed at the intersections of rows of gate lines and columns of data lines on at least one of the substrates, wherein at least one of said substrates is sufficiently flexible when touched to change the separation between said substrates at any of said pixels, a plurality of sense signal lines formed parallel to the data lines, and a sense signal processing unit connected with the sense signal lines for sensing a change in capacitance between said substrates at any of said pixels.
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Citations
14 Claims
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1. An electrophoretic display having a pair of substrates separated by a microcapsule layer, a plurality of pixels formed at the intersections of rows of gate lines and columns of data lines on at least one of the substrates, comprising:
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at least one of said substrates being sufficiently flexible when touched to change the separation between said substrates at any of said pixels; a plurality of sense signal lines formed parallel to the data lines; and a sense signal processing unit connected with the sense signal lines for sensing a change in capacitance between said substrates at any of said pixels. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method for manufacturing an electrophoretic display comprising:
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forming a plurality of gate lines on a substrate; forming a gate insulating layer that covers the gate lines; forming a semiconductor layer on the gate insulating layer; forming a plurality of data lines orthogonal to said gate lines on the gate insulating layer; forming a plurality of sense signal lines parallel to the data lines; forming a passivation layer for covering the data lines and the sense signal lines having contact holes that expose portions of said semiconductor layer; and forming a pixel electrode connected with said exposed portions of said semiconductor layer to form first, second and third thin film transistors connected to respective ones of said gate lines. - View Dependent Claims (8, 9, 10, 11, 13, 14)
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Specification